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1.发明申请公开(公告)号：US20110225353A1
公开(公告)日：2011-09-15
申请号：US13126141
申请日：2008-10-30
CPC分类号： G06F12/0804 , G06F2212/2022
摘要： In at least some embodiments, a computing system includes a processor and a communication bus external to the processor. The computing system also includes a Redundant Array of Independent Disks (RAID) write cache sub-assembly coupled to the communication bus, the RAID write cache sub-assembly having non-volatile memory.
摘要翻译： 在至少一些实施例中，计算系统包括处理器和处理器外部的通信总线。 计算系统还包括耦合到通信总线的独立磁盘冗余阵列（RAID）写高速缓存子组件，该RAID写高速缓存子组件具有非易失性存储器。
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2.发明授权System having storage subsystems and a link coupling the storage subsystems 失效具有存储子系统的系统和耦合存储子系统的链路公开(公告)号：US07035952B2
公开(公告)日：2006-04-25
申请号：US10669388
申请日：2003-09-24
IPC分类号： G06F13/00
CPC分类号： G06F13/387
摘要： A system includes plural storage subsystems each having a controller and an expander to couple to storage devices. The controller accesses the storage devices through the expander, and the expander has interfaces for coupling to the storage devices. The system further includes an intercontroller link to connect expanders in two storage subsystems to enable the controller in one of the storage subsystems to communicate with the controller in another one of the storage subsystems through the expanders and the intercontroller link.
摘要翻译： 系统包括多个存储子系统，每个存储子系统具有控制器和扩展器以耦合到存储设备。 控制器通过扩展器访问存储设备，并且扩展器具有用于耦合到存储设备的接口。 该系统还包括一个互连器链接，以连接两个存储子系统中的扩展器，以使存储子系统之一中的控制器能够通过扩展器和互连器链路与另一个存储子系统中的控制器进行通信。
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3.发明授权公开(公告)号：US08417967B2
公开(公告)日：2013-04-09
申请号：US12935715
申请日：2008-04-02
CPC分类号： H04L63/06 , G06F21/78 , G06F2221/2107 , G11B20/0021 , G11B2220/415
摘要： Embodiments include methods, apparatus, and systems for storage device data encryption. One method includes encrypting data on a storage device with a key and then transmitting the key to a cryptographic module that encrypts the key to form a Binary Large Object (BLOB). The BLOB is transmitted to an array controller that is coupled to the storage device which stores the BLOB.
摘要翻译： 实施例包括用于存储设备数据加密的方法，设备和系统。 一种方法包括使用密钥对存储设备上的数据进行加密，然后将密钥发送到加密密钥以形成二进制大对象（BLOB）的加密模块。 BLOB被发送到阵列控制器，该阵列控制器耦合到存储该BLOB的存储设备。
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公开(公告)号：US07028106B2
公开(公告)日：2006-04-11
申请号：US10728480
申请日：2003-12-05
IPC分类号： G06F13/00
CPC分类号： G06F13/404 , G06F13/4045
摘要： A system includes a peripheral device and an expander having interfaces to couple to one or more peripheral devices and an expander. The expander has a storage to store entries containing routing information used to route a request received by the expander to one of the interfaces, wherein each interface is allocated to a respective set of routing information entries. Mapping logic remaps unused routing information of one of the interfaces to one or more other interfaces to expand capacity of the one or more other interfaces.
摘要翻译： 一种系统包括具有耦合到一个或多个外围设备和扩展器的接口的外围设备和扩展器。 扩展器具有存储，用于存储包含用于将扩展器接收的请求路由到其中一个接口的路由信息的条目，其中每个接口被分配给相应的一组路由信息条目。 映射逻辑将其中一个接口的未使用路由信息重新映射到一个或多个其他接口，以扩展一个或多个其他接口的容量。
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公开(公告)号：USD368165S
公开(公告)日：1996-03-26
申请号：US34554
申请日：1995-02-07
申请人： Joseph E. Foster
设计人： Joseph E. Foster
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公开(公告)号：US20110296100A1
公开(公告)日：2011-12-01
申请号：US12787642
申请日：2010-05-26
CPC分类号： G06F12/0804 , G06F11/1662 , G06F11/2015 , G06F11/2094 , G06F12/0815 , G06F12/0866
摘要： To migrate data from a first storage system to a second storage system, the second storage system detects a migration of a persistent storage media from the first storage system to the second storage system. In response to detecting the migration of the persistent storage media, write information from a write cache in the first storage system is copied to a write cache in the second storage system, where the write caches in the first and second storage systems were not maintained synchronously before the write information from the write cache in the first storage system is copied to the write cache in the second storage system.
摘要翻译： 为了将数据从第一存储系统迁移到第二存储系统，第二存储系统检测持久存储介质从第一存储系统向第二存储系统的迁移。 响应于检测到持久存储介质的迁移，将来自第一存储系统中的写入高速缓存的写入信息复制到第二存储系统中的写入高速缓存中，其中第一和第二存储系统中的写高速缓冲存储器未被同步地维护 在来自第一存储系统中的写入高速缓存的写入信息被复制到第二存储系统中的写入高速缓存之前。
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公开(公告)号：US06840259B1
公开(公告)日：2005-01-11
申请号：US10660993
申请日：2003-09-12
申请人： Neil E. Russell , Joseph E. Foster
发明人： Neil E. Russell , Joseph E. Foster
CPC分类号： F15B20/001 , Y10T137/0396 , Y10T137/87209
摘要： A double valve for controlling a machine tool has a memory such that when the valve is in its normal deactuated state and the inlet air supply is cycled (e.g., turned from on to off or from off to on), then the valve remains in the deactuated (i.e., ready to run) state. When the valve is in a faulted state (e.g., intermediate position) and the inlet air supply is cycled, then the valve remains in the faulted state. The memory is achieved by a balanced condition of the movable valve elements when in the normal deactuated position and an unbalanced or latched condition when in the intermediate or faulted position.
摘要翻译： 用于控制机床的双重阀具有存储器，使得当阀处于其正常停用状态并且进气供应循环（例如，从开到关或从关闭转到打开）时，阀保持在 停用（即准备运行）状态。 当阀处于故障状态（例如中间位置）并且进气供应循环时，阀保持在故障状态。 当处于正常停用位置时，通过可动阀元件的平衡状态和处于中间或故障位置时的不平衡或锁定状态来实现记忆。
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8.发明授权System for flushing queued memory write request corresponding to a queued read request and all prior write requests with counter indicating requests to be flushed 失效用于刷新与排队的读取请求相对应的排队的存储器写请求的系统和具有计数器的所有先前的写请求的指示要刷新的请求的系统
公开(公告)号：US5948081A
公开(公告)日：1999-09-07
申请号：US995367
申请日：1997-12-22
申请人： Joseph E. Foster
发明人： Joseph E. Foster
CPC分类号： G06F13/1642
摘要： A computer is provided having a bus interface unit between a CPU bus and a memory bus. The bus interface unit includes a memory controller and a read/write queue manager. The memory controller dispatches, or removes read requests or write requests from respective read or write requests queues depending on various modes of operation. Typically, the read requests are dispatched or removed either singularly or as a programmed series of read requests prioritized over write requests unless the write request queue is almost full. If the write request queue is almost full, then write request are removed either singularly or in a series before servicing the read request queue. The number of read or write request being removed from their respective queues can be programmed within a configuration register operably coupled to a controller arranged between the read and write request queues. The memory controller determines how many requests will be serviced within possibly a lengthy series of requests. By dispatching like requests (a series of reads followed by a series of writes, etc.) memory bus efficiency and/or pipelining is greatly improved.
摘要翻译： 提供了一种在CPU总线和存储器总线之间具有总线接口单元的计算机。 总线接口单元包括存储器控制器和读/写队列管理器。 存储器控制器根据各种操作模式分派或从相应的读取或写入请求队列中读取请求或写入请求。 通常，读请求被单独地分派或移除，或者作为编写的读请求序列，优先于写请求，除非写请求队列几乎已满。 如果写请求队列几乎已满，则在为读请求队列提供服务之前，写请求将单独或一系列地删除。 从其相应队列中移除的读取或写入请求的数量可以在配置寄存器内编程，该配置寄存器可操作地耦合到布置在读取和写入请求队列之间的控制器。 存储器控制器确定在可能的冗长的一系列请求中将服务多少个请求。 通过派遣类似请求（一系列读取，然后是一系列写入等），显着提高了存储器总线效率和/或流水线化。
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9.发明授权RAID performance using command descriptor block pointer forwarding technique 有权使用命令描述符块指针转发技术的RAID性能公开(公告)号：US08151014B2
公开(公告)日：2012-04-03
申请号：US11242089
申请日：2005-10-03
申请人： Joseph E. Foster
发明人： Joseph E. Foster
CPC分类号： G06F13/28 , G06F11/1076 , G06F2211/1009
摘要： The apparatus in one example may have: at first and second processing devices; at least one sequence of processes for the first and second devices; the at least one sequence having a command forward instruction such that, after the first processing device completes processing a first process of the at least one sequence of processes, the first processing device forwards, without producing an interrupt, the command forward instruction to the second processing device to effect processing of a second process of the at least one sequence of processes.
摘要翻译： 一个示例中的装置可以具有：第一和第二处理装置; 用于所述第一和第二设备的至少一个过程序列; 所述至少一个序列具有命令前向指令，使得在所述第一处理设备完成所述至少一个进程序列的第一处理之后，所述第一处理设备在不产生中断的情况下转发所述命令转发指令给所述第二处理器 处理装置来实现所述至少一个进程序列的第二进程的处理。
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10.发明申请High throughput double valve with reduced outlet pressure during a faulted state 有权高通量双阀，在故障状态下具有降低的出口压力公开(公告)号：US20090090421A1
公开(公告)日：2009-04-09
申请号：US11906927
申请日：2007-10-04
IPC分类号： F17D1/00
CPC分类号： F15B20/001 , F16K11/048 , Y10T137/87209 , Y10T137/87338
摘要： A double valve having inlet, outlet, and exhaust ports maintains an outlet pressure below one percent of inlet pressure during a faulted state while maintaining a relatively small exhaust for reduced overall valve size. Crossover passages receive inlet pressure through main crossover poppets when the respective valve units are not in a deactuated position. When the valve units are in a deactuated position, then the crossover passages receive inlet pressure through respective bypass passages whose flow rate can be controlled independently from the size of the crossover poppets. The use of bypass passages provides particular benefits for double valves for non-press applications which have a ratio of exhaust flow coefficient to inlet flow coefficient that is less than about 2.5.
摘要翻译： 具有入口，出口和排气口的双重阀在故障状态期间保持出口压力低于入口压力的百分之一，同时保持相对较小的排气以减小总体阀门尺寸。 当相应的阀单元不处于停用位置时，交叉通道接收通过主交叉口的入口压力。 当阀单元处于停用位置时，交叉通道通过相应的旁路通道接收入口压力，其流量可以独立于交叉弹簧的尺寸来控制。 旁路通道的使用对于非压力应用的双重阀具有特别的益处，其具有排气流量系数与入口流量系数小于约2.5的比率。
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