-
公开(公告)号：US06216192B1
公开(公告)日：2001-04-10
申请号：US09107940
申请日：1998-06-30
IPC分类号： G06F1300
CPC分类号： G06F13/4027
摘要： A system and method to permit access requests from a mezzanine bus through different bridges to perform in similar ways in disclosed. The access requests are serviced even if the bridges are configured differently, therefore allowing hardware and software management by allowing software to treat peripheral devices attached to different types of bridges as similar devices. Features of the peripheral devices, therefore, can be more effectively and more fully accessed by evading limitations of the addressing mode for one or more of the bridges.
摘要翻译： 一种通过不同网桥允许来自夹层总线的访问请求的系统和方法，以类似的方式在所公开的情况下执行。 即使桥接器配置不同，访问请求也被服务，因此通过允许软件将连接到不同类型的网桥的外围设备视为类似设备来允许硬件和软件管理。 因此，通过回避一个或多个桥接器的寻址模式的限制，可以更有效地和更全面地访问外围设备的特征。
-
2.发明授权Apparatus and method for accessing SMRAM in a computer based upon a processor employing system management mode 失效基于采用系统管理模式的处理器在计算机中访问SMRAM的装置和方法
公开(公告)号：US5638532A
公开(公告)日：1997-06-10
申请号：US350343
申请日：1994-12-06
申请人： Robert C. Frame , Mark J. Foster
发明人： Robert C. Frame , Mark J. Foster
CPC分类号： G06F12/0888 , G06F12/0623 , G06F13/1668
摘要： Computer systems using a processor that is capable of operating in a system management mode (SMM) employ a dedicated system management RAM (SMRAM). The processor uses the SMRAM when the processor is performing a task associated with the SMM. The processor is capable of generating a range of system addresses. The range includes a particular subrange of system addresses that are used for accessing the SMRAM. A memory controller decodes the system addresses generated by the processor and enables access to the SMRAM, regardless of whether the processor is operating in the SMM, when the controller decodes a system address of the particular subrange. The range of system addresses also includes a second subrange. The memory controller also enables access to the SMRAM when the processor is operating in the SMM and the controller decodes a system address of the second subrange. The memory controller indicates to the processor whether data associated with the enabled SMRAM can be stored in a cache memory.
摘要翻译： 使用能够以系统管理模式（SMM）操作的处理器的计算机系统使用专用系统管理RAM（SMRAM）。 当处理器执行与SMM关联的任务时，处理器使用SMRAM。 处理器能够生成一系列系统地址。 该范围包括用于访问SMRAM的特定的系统地址子范围。 存储器控制器解码由处理器生成的系统地址，并且当控制器解码特定子范围的系统地址时，无论处理器是否在SMM中操作，都能够访问SMRAM。 系统地址的范围还包括第二个子范围。 当处理器在SMM中操作时，存储器控制器还能够访问SMRAM，并且控制器解码第二子范围的系统地址。 存储器控制器向处理器指示与启用的SMRAM相关联的数据是否可以存储在高速缓冲存储器中。
-
公开(公告)号：US5454111A
公开(公告)日：1995-09-26
申请号：US170846
申请日：1993-12-21
申请人： Robert C. Frame , Fernando A. Zayas
发明人： Robert C. Frame , Fernando A. Zayas
IPC分类号： G06F11/30 , G06F13/00 , G06F13/36 , G06F13/368
CPC分类号： G06F13/36
摘要： A method and arrangement for preventing the locking out of devices which are coupled to a bus by either of two of the devices which have become initiator and target devices respectively. The devices arbitrate for control of the bus after the bus enters a bus free phase. The device which wins the arbitration becomes an initiator. A timer in each device on the bus is started upon the initiation of arbitration. The initiator device is removed from the bus when an elapsed time after the timers have been started reaches a predetermined value. The distributed clock of the invention ensures that the devices coupled to the bus will clear the bus after the initiator has been on the bus for a pre-determined time, thereby obviating skew problems associated with single clocked systems.
摘要翻译： 一种用于防止通过分别成为启动器和目标装置的两个装置中的任一个来耦合到总线的装置锁定的方法和装置。 总线进入总线自由相位后，设备仲裁总线的控制。 赢得仲裁的设备成为启动器。 总线上的每个设备中的定时器在仲裁开始时启动。 当定时器启动后的经过时间达到预定值时，从总线上移除启动器设备。 本发明的分布式时钟确保了在启动器已经在总线上预定时间之后，耦合到总线的设备将清除总线，从而避免与单个时钟系统相关联的偏斜问题。
-
4.发明授权Method and apparatus for transferring information over a common parallel bus using a fixed sequence of bus phase transitions 失效使用固定的总线相变序列在公共并行总线上传送信息的方法和装置
公开(公告)号：US5287463A
公开(公告)日：1994-02-15
申请号：US562433
申请日：1990-07-19
申请人： Robert C. Frame , Fernando A. Zayas
发明人： Robert C. Frame , Fernando A. Zayas
CPC分类号： G06F13/4213
摘要： An atomic ordered sequence of information phase transitions allows for the design of a pure hardware protocol controller for use in a small storage interconnect bus. The information phase transitions follow the sequence: Command Out phase, Data Out phase, and Status In phase. The only other transition sequence allowed is from the Command Out phase directly to the Status In phase. The Command Out phase is actually a header delivering header information. Included in the header are a REQ/ACK offset byte, source destination ID verify byte, frame length bytes, and a checksum byte. The Data Out phase contains any number of bytes that were defined in the Command Out frame length byte. The Status In phase is a single byte which is used to signal the outcome of the attempted data delivery.
摘要翻译： 信息相位转换的原子有序序列允许设计用于小型存储互连总线的纯硬件协议控制器。 信息相位转换遵循序列：命令输出阶段，数据输出阶段和状态输入阶段。 允许的唯一其他转换序列是从Command Out阶段直接进入Status In阶段。 命令输出阶段实际上是一个提供标题信息的报头。 标题中包括REQ / ACK偏移字节，源目标ID验证字节，帧长度字节和校验和字节。 数据输出阶段包含在命令输出帧长度字节中定义的任意数量的字节。 状态同步是一个单字节，用于指示尝试的数据传送结果。
-
公开(公告)号：US06982702B1
公开(公告)日：2006-01-03
申请号：US09096684
申请日：1998-06-12
申请人： Robert C. Frame
发明人： Robert C. Frame
IPC分类号： G09G5/00
CPC分类号： G06F1/1669 , G06F1/1616 , G06F1/1654 , G06F1/1656 , Y10S248/917 , Y10S345/905
摘要： A portable computer system includes one or more battery connectors, a portable base computer, and a portable user interface module. The base computer includes a wireless receiver, and a processor having a data input operatively connected to the receiver and a power input operatively connected to at least one of the connectors. The base computer also includes mass storage operatively connected to the processor, and a wireless transmitter operatively connected to the processor. The user interface module includes a wireless receiver and a two-dimensional display having a data input operatively connected to the receiver and a power input operatively connected to at least one of the connectors. The user interface device further includes a user interface device and a wireless transmitter operatively connected to the user interface device.
摘要翻译： 便携式计算机系统包括一个或多个电池连接器，便携式基本计算机和便携式用户接口模块。 基本计算机包括无线接收器和具有可操作地连接到接收器的数据输入的处理器和可操作地连接到至少一个连接器的电源输入。 基本计算机还包括可操作地连接到处理器的大容量存储器，以及可操作地连接到处理器的无线发射器。 用户接口模块包括无线接收器和具有可操作地连接到接收器的数据输入的二维显示器和可操作地连接到至少一个连接器的电源输入。 用户接口设备还包括用户接口设备和可操作地连接到用户接口设备的无线发射机。
-
公开(公告)号：US06778385B2
公开(公告)日：2004-08-17
申请号：US10127960
申请日：2002-04-23
IPC分类号： G06F116
CPC分类号： G06F1/1616 , G06F1/1632
摘要： A portable computer has pivotally connected base and display screen lid housings and is provided with a generally wedge-shaped auxiliary component housing which is releasably latchable to the bottom of the base housing and extends across only a rear underside portion of the base housing. The attached auxiliary housing representatively carries a CD/DVD media drive unit and a floppy disk drive unit, operatively couples them to various computer components in the base housing, and is configured to rearwardly and upwardly tilt he base housing keyboard at a predetermined comfortable typing angle when the base housing is placed atop a horizontal work surface such as a desktop.
摘要翻译： 便携式计算机具有枢转地连接的基座和显示屏幕盖壳体，并且设置有大致楔形的辅助部件壳体，该壳体可释放地闩锁到基座壳体的底部并且仅延伸穿过底座壳体的后下侧部分。 所附的辅助壳体代表性地携带CD / DVD介质驱动单元和软盘驱动单元，可操作地将它们耦合到基座壳体中的各种计算机部件，并且被配置为以预定的舒适打字角向后和向上倾斜基座外壳键盘 当基座被放置在诸如桌面的水平工作表面上方时。
-
7.发明授权Method and apparatus for transferring data between a data bus and a data storage device 失效用于传输数据总线和数据存储设备之间的数据的方法和装置
公开(公告)号：US5182752A
公开(公告)日：1993-01-26
申请号：US545860
申请日：1990-06-29
申请人： John E. DeRoo , Robert C. Frame , Ann Solli
发明人： John E. DeRoo , Robert C. Frame , Ann Solli
CPC分类号： G06F11/10 , G06F11/08 , G06F11/1004
摘要： A bus interface between a data bus and data-storage devices provides error protection for multi-byte data packets received from the bus and intended for storage on an associated storage device by checking a packet for errors using check sum symbols and parity bits in the packet. The bus interface then (i) encodes a predetermined number of data symbols to generate error detection symbols, (ii) again checks the data symbols for errors using the parity bits, and (iii) stores the data and associated error detection symbols in one of the series of linked buffers. Each buffer holds enough to fill one storage unit, or sector. A storage interface later retrieves the buffered data and error detection symbols, combines them with the address of a designated storage sector, and encodes the symbols to generate error correction symbols. It then stores the encoded data, and error detection and correction symbols in the designated sector. When the storage interface later retrieves the symbols from the sector, it corrects errors in the data using the retrieved error correction symbols. It next removes the sector address from the error detection symbols and returns the data and error detection symbols to the bus interface. The bus interface (i) generates parity bits, (ii) checks for errors using the error detection symbols, (iii) generates check sum symbols and (iv) transmits the data, check sum and parity symbols over the bus. If the bus interface at any time detects an error, it stops the data transfer operation.
-
公开(公告)号：US06838810B1
公开(公告)日：2005-01-04
申请号：US08822438
申请日：1997-03-21
申请人： Michele Bovio , Robert C. Frame
发明人： Michele Bovio , Robert C. Frame
CPC分类号： G06F1/165 , G06F1/1616 , G06F1/1637 , Y10S248/923 , Y10S345/905
摘要： A flat-panel display with fixtures in its sidewalls to enable support by lateral mounting members is disclosed. The advantage of this approach, in which the fixtures are essentially rotated around to the sides of the flat-panel display, is the reduction in the portion of the portable computer's top cover that is not the active display. In practice, this results in an increase in the size of the display that may be housed in the same-sized top cover. In order to accommodate the lateral mounting of the flat-panel display, metal brackets are used. These brackets extend from the base unit hinges and cradle the display. This adds torsional rigidity, but also removes the requirement that the back must be structural. Further reductions in the inactive portions of the top cover may be achieved by extending the ends of the display's fluorescent back-light beyond or through the metal rim that surrounds the display.
摘要翻译： 公开了一种平板显示器，其在其侧壁具有固定装置以使得能够由横向安装构件支撑。 固定装置基本上围绕平板显示器的侧面旋转的这种方法的优点在于便携式计算机顶盖部分的不是主动显示器的减少。 实际上，这导致可以容纳在相同尺寸的顶盖中的显示器的尺寸的增加。 为了适应平板显示器的横向安装，使用金属支架。 这些支架从底座单元铰链延伸并摇摆显示屏。 这增加了扭转刚度，但也消除了背部必须是结构的要求。 可以通过将显示器的荧光背光的端部延伸超过或通过围绕显示器的金属边缘来实现顶盖的不活动部分的进一步减小。
-
公开(公告)号：US06392880B1
公开(公告)日：2002-05-21
申请号：US09294233
申请日：1999-04-19
IPC分类号： G06F116
CPC分类号： G06F1/1616 , G06F1/1632
摘要： A portable computer has pivotally connected base and display screen lid housings and is provided with a generally wedge-shaped auxiliary component housing which is releasably latchable to the bottom of the base housing and extends across only a rear underside portion of the base housing. The attached auxiliary housing representatively carries a CD/DVD media drive unit and a floppy disk drive unit, operatively couples them to various computer components in the base housing, and is configured to rearwardly and upwardly tilt he base housing keyboard at a predetermined comfortable typing angle when the base housing is placed atop a horizontal work surface such as a desktop.
-
10.发明授权Reservation and dynamic allocation of resources for sole use of docking peripheral device 失效专用于对接外围设备的资源的预留和动态分配公开(公告)号：US06170020A
公开(公告)日：2001-01-02
申请号：US09107598
申请日：1998-06-30
IPC分类号： G06F1314
CPC分类号： G06F9/5011 , G06F1/1632 , G06F9/4411 , G06F13/24 , G06F13/4081 , G06F2209/5014
摘要： A computer including a computer housing having a processor and a number of peripheral devices operatively connected to the processor, a docking connector mounted on the computer housing and operatively connected to the processor, a reservation module operative to reserve one of a plurality of resources for use by a peripheral device operatively connected to a docking station that is operatively connectable to the docking connector, and an allocation module responsive to an indication from the reservation module operative to allocate the one of the resources to one of the plurality of peripheral devices.
摘要翻译： 一种包括具有处理器和可操作地连接到处理器的多个外围设备的计算机外壳的计算机，安装在计算机外壳上并可操作地连接到处理器的对接连接器，可预留多个资源中的一个以供使用的预留模块 通过可操作地连接到可操作地连接到对接连接器的对接站的外围设备，以及响应于来自预留模块的指示的分配模块，其可操作地将资源中的一个分配给多个外围设备中的一个。
-
-
-
-
-
-
-
-
-
搜索结果
16 条记录 (耗时 0.024 秒)
