公开(公告)号：US5738797A

公开(公告)日：1998-04-14

申请号：US649377

申请日：1996-05-17

申请人： Robert E. Belke, Jr. ,  Michael G. Todd ,  Andrew Z. Glovatsky ,  Alice D. Zitzmann

发明人： Robert E. Belke, Jr. ,  Michael G. Todd ,  Andrew Z. Glovatsky ,  Alice D. Zitzmann

IPC分类号： C23F1/02 ,  H05K3/00 ,  H05K3/06 ,  H05K3/20 ,  H05K3/46 ,  B44C1/22 ,  C23F1/00

CPC分类号： H05K3/4685 ,  C23F1/02 ,  H05K3/062 ,  H05K3/205 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2201/09018 ,  H05K2201/09118 ,  H05K2203/0152 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K3/0014

摘要： A three dimensional multi-layer circuit structure is formed by partially etching a foil having a coating. A pre-circuit is formed by providing a metal foil, applying a photodefinable photoresist to each side of the metal foil, selectively exposing and developing the photoresist leaving exposed areas and unexposed areas and, plating the unexposed areas with a second metal. The pre-circuit is placed in an etching solution and removed after the etching solution partially etches the metal foil to undercut the second metal. The partially etched pre-circuit is then bent into a predetermined shape. The partially etched pre-circuit is then inserted into a mold cavity so that at least one surface of the circuit structure is adjacent to the mold. The mold is filled with a polymer resin so that the polymer resin encapsulates at least a portion of the partially etched pre-circuit and substantially fills the undercut. The molded circuit structure is then removed from the mold and the metallic foil is further etched to complete the forming of the circuit.

摘要翻译： 通过部分蚀刻具有涂层的箔形成三维多层电路结构。 通过提供金属箔，在金属箔的每一侧上施加可光限定的光致抗蚀剂，选择性地暴露和显影光致抗蚀剂以形成暴露区域和未曝光区域，以及用第二金属镀覆未曝光区域来形成预制电路。 将预电路放置在蚀刻溶液中，并且在蚀刻溶液部分蚀刻金属箔以切割第二金属之后移除。 然后将部分蚀刻的预循环弯曲成预定的形状。 然后将部分蚀刻的预制电路插入模腔中，使得电路结构的至少一个表面与模具相邻。 模具填充有聚合物树脂，使得聚合物树脂封装部分蚀刻的预循环的至少一部分并且基本上填充底切。 然后将模制电路结构从模具中取出，并且金属箔被进一步蚀刻以完成电路的形成。