公开(公告)号：US09974188B2

公开(公告)日：2018-05-15

申请号：US15090703

申请日：2016-04-05

申请人： Compass Technology Company Limited

发明人： Kelvin Po Leung Pun ,  Chee Wah Cheung

IPC分类号： H05K1/09 ,  H05K3/00 ,  H05K1/02 ,  H05K1/03

CPC分类号： H05K3/0041 ,  G06F3/041 ,  H05K1/0278 ,  H05K1/0306 ,  H05K1/0326 ,  H05K1/0346 ,  H05K1/09 ,  H05K1/144 ,  H05K3/0064 ,  H05K3/025 ,  H05K3/027 ,  H05K3/381 ,  H05K2201/0141 ,  H05K2201/0145 ,  H05K2201/0154 ,  H05K2201/0323 ,  H05K2201/042 ,  H05K2203/0152 ,  H05K2203/0376 ,  H05K2203/095 ,  H05K2203/1545

摘要： A process for forming a graphene circuit pattern on an object is described. A graphene layer is grown on a metal foil. A bonding layer is formed on a protective film and a surface of the bonding layer is roughened. The graphene layer is transferred onto the roughened surface of the bonding layer. The protective film is removed and the bonding layer is laminated to a first core dielectric substrate. The metal foil is etched away. Thereafter the graphene layer is etched using oxygen plasma etching to form graphene circuits on the first core dielectric substrate. The first core dielectric substrate having graphene circuits thereon is bonded together with a second core dielectric substrate wherein the graphene circuits are on a side facing the second core dielectric substrate wherein an air gap is left therebetween.

公开(公告)号：US20180077799A1

公开(公告)日：2018-03-15

申请号：US15822222

申请日：2017-11-27

申请人： Unimicron Technology Corp.

发明人： Ming-Hao Wu ,  Shu-Sheng Chiang ,  Wei-Ming Cheng

IPC分类号： H05K1/11 ,  H05K1/09 ,  H05K3/40 ,  H05K3/46

CPC分类号： H05K1/111 ,  H05K1/0266 ,  H05K1/0296 ,  H05K1/0298 ,  H05K1/09 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/0073 ,  H05K3/4038 ,  H05K3/4092 ,  H05K3/4644 ,  H05K3/4697 ,  H05K2201/09036 ,  H05K2201/094 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2203/0376 ,  H05K2203/163

摘要： A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening communicating the cavity and a pad of the first patterned circuit layer is located in the opening. A hole diameter of the opening is smaller than a hole diameter of cavity. An inner surface of the inner dielectric layer exposed by the cavity and a top surface of the pad are coplanar or have a height difference.

公开(公告)号：US20170042044A1

公开(公告)日：2017-02-09

申请号：US15229203

申请日：2016-08-05

申请人： JX Nippon Mining & Metals Corporation

发明人： Nobuaki Miyamoto

IPC分类号： H05K3/46 ,  H05K3/02 ,  H05K1/09

CPC分类号： H05K3/4682 ,  H05K1/09 ,  H05K3/0035 ,  H05K3/007 ,  H05K3/025 ,  H05K3/108 ,  H05K3/4611 ,  H05K3/4661 ,  H05K2201/0355 ,  H05K2203/0307 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/06

摘要： Provided herein is a carrier-attached copper foil having desirable fine circuit formability. The carrier-attached copper foil includes a carrier, an interlayer, and an ultrathin copper layer in this order, wherein D2-D1 is 0.30 to 3.83 μm, where D1 is the gravimetrically measured thickness of the carrier-attached copper foil excluding the carrier and the interlayer, and D2 is the maximum thickness of the layer remaining on a bismaleimide-triazine resin substrate in case of detaching the carrier after the carrier-attached copper foil is laminated to the resin substrate from the ultrathin copper layer side by being heat pressed under a pressure of 20 kgf/cm2 at 220° C. for 2 hours.

摘要翻译： 本文提供了具有所需的精细电路成形性的载体附着铜箔。 载体附着的铜箔依次包括载体，中间层和超薄铜层，D2-D1为0.30〜3.83μm，D1为载体附着铜箔的重量测定厚度，不包括载体， 中间层D2是在将载体附着铜箔从超薄铜层侧层压到树脂基板上之后通过热压下而分离载体的情况下，在双马来酰亚胺 - 三嗪树脂基板上残留的层的最大厚度 在220℃下压力为20kgf / cm 2小时。

公开(公告)号：US20160381796A1

公开(公告)日：2016-12-29

申请号：US15096993

申请日：2016-04-12

申请人： Samsung Electro-Mechanics Co., Ltd.

发明人： Sung-Uk LEE ,  Il-Jong SEO ,  Jae-Hoon CHOI ,  Yong-Ho BAEK

IPC分类号： H05K1/11 ,  H05K3/06

CPC分类号： H05K1/115 ,  H05K3/067 ,  H05K3/4647 ,  H05K3/4682 ,  H05K3/4697 ,  H05K2201/0361 ,  H05K2201/09854 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/0384

摘要： A printed circuit board and a method of manufacturing a printed circuit board are provided. The printed circuit board includes an insulating layer, a circuit layer embedded in the insulating layer, a solder resist layer disposed on one surface of the insulating layer, the solder resist layer having a cavity of a through-hole shape to expose a part of the circuit layer from the insulating layer, and a metal post embedded in the solder resist layer and exposed to outside via an opening of the solder resist layer, and the metal post includes a first post metal layer, a post barrier layer, and a second post metal layer disposed in that order.

摘要翻译： 提供印刷电路板和制造印刷电路板的方法。 印刷电路板包括绝缘层，嵌入绝缘层中的电路层，设置在绝缘层的一个表面上的阻焊层，阻焊层具有通孔形状的空腔，以暴露部分 电路层，以及嵌入到阻焊层中并经由阻焊层的开口暴露于外部的金属柱，金属柱包括第一后​​金属层，后阻挡层和第二柱 金属层。

公开(公告)号：US09497853B2

公开(公告)日：2016-11-15

申请号：US13997544

申请日：2011-12-23

申请人： Sang Myung Lee ,  Sung Woon Yoon ,  Hyuk Soo Lee ,  Sung Won Lee ,  Ki Do Chun

发明人： Sang Myung Lee ,  Sung Woon Yoon ,  Hyuk Soo Lee ,  Sung Won Lee ,  Ki Do Chun

IPC分类号： H01B13/00 ,  H05K1/11 ,  H05K1/02 ,  H05K3/46 ,  H05K3/20

CPC分类号： H05K1/0298 ,  H05K3/202 ,  H05K3/4647 ,  H05K3/465 ,  H05K3/4652 ,  H05K3/4682 ,  H05K2201/098 ,  H05K2203/0323 ,  H05K2203/0376

摘要： Disclosed are a printed circuit board and a method for manufacturing the same. The printed circuit board includes a core insulating layer, at least one via formed through the core insulating layer, an inner circuit layer buried in the core insulating layer, and an outer circuit layer on a top surface or a bottom surface of the core insulating layer, wherein the via includes a center part having a first width and a contact part having a second width, the contact part makes contact with a surface of the core insulating layer, and the first width is larger than the second width. The inner circuit layer and the via are simultaneously formed so that the process steps are reduced. Since odd circuit layers are provided, the printed circuit board has a light and slim structure.

摘要翻译： 公开了一种印刷电路板及其制造方法。 印刷电路板包括芯绝缘层，至少一个通过芯绝缘层形成的通孔，埋在芯绝缘层中的内电路层，以及在芯绝缘层的顶表面或底表面上的外电路层 其中所述通孔包括具有第一宽度的中心部分和具有第二宽度的接触部分，所述接触部分与所述芯绝缘层的表面接触，并且所述第一宽度大于所述第二宽度。 同时形成内部电路层和通孔，从而减少工艺步骤。 由于设置了奇数电路层，所以印刷电路板具有轻薄的结构。

公开(公告)号：US20160250830A1

公开(公告)日：2016-09-01

申请号：US15027323

申请日：2014-10-08

申请人： SUMITOMO ELECTRIC PRINTED CIRCUITS, INC. ,  SUMITOMO ELECTRIC INDUSTRIES, LTD.

发明人： Satoshi KIYA ,  Sumito UEHARA ,  Kousuke MIURA ,  Makoto NAKABAYASHI

IPC分类号： B32B27/32 ,  H05K3/38 ,  H05K1/02 ,  H05K3/20 ,  B32B7/12 ,  H05K1/03

CPC分类号： B32B27/322 ,  B32B7/12 ,  B32B27/30 ,  B32B2457/08 ,  H05K1/024 ,  H05K1/0274 ,  H05K1/034 ,  H05K1/0366 ,  H05K3/007 ,  H05K3/067 ,  H05K3/20 ,  H05K3/281 ,  H05K3/285 ,  H05K3/386 ,  H05K3/389 ,  H05K2201/0108 ,  H05K2201/015 ,  H05K2201/0158 ,  H05K2201/0191 ,  H05K2201/0195 ,  H05K2201/0326 ,  H05K2201/09781 ,  H05K2201/2009 ,  H05K2203/0264 ,  H05K2203/0278 ,  H05K2203/0376 ,  H05K2203/0769 ,  H05K2203/1173

摘要： A fluororesin base material containing a fluororesin as a main component includes a modified layer on at least a partial region of a surface thereof, the modified layer containing a siloxane bond and a hydrophilic organofunctional group, and a surface of the modified layer having a contact angle of 90° or less with pure water.

摘要翻译： 含氟树脂作为主要成分的氟树脂基材在其表面的至少部分区域上具有改性层，所述改性层含有硅氧烷键和亲水性有机官能团，所述改性层的表面具有接触角 90°以下。

公开(公告)号：US20160242284A9

公开(公告)日：2016-08-18

申请号：US14226584

申请日：2014-03-26

申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.

发明人： Myung Sam KANG ,  Jeong Woo PARK ,  Ok Tae KIM ,  Kil Yong YUN

IPC分类号： H05K1/11 ,  H05K1/09

CPC分类号： H05K1/111 ,  H05K1/09 ,  H05K1/115 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2203/0323 ,  H05K2203/0376 ,  Y02P70/611 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49222

摘要： A printed circuit board includes an upper circuit layer including a circuit pattern embedded in an upper part of an insulating layer, the circuit pattern being made of electroconductive metal; and a metal bump formed on the circuit pattern and the insulating layer

摘要翻译： 印刷电路板包括上电路层，其包括嵌入在绝缘层的上部的电路图案，所述电路图案由导电金属制成; 以及形成在电路图案和绝缘层上的金属凸块

公开(公告)号：US20150289380A1

公开(公告)日：2015-10-08

申请号：US14741545

申请日：2015-06-17

申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD.

发明人： Kotaro KODANI ,  Kentaro KANEKO ,  Kazuhiro KOBAYASHI

IPC分类号： H05K3/10

CPC分类号： H05K3/10 ,  H01L21/4846 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/15174 ,  H05K1/113 ,  H05K3/00 ,  H05K3/205 ,  H05K3/4682 ,  H05K2201/0338 ,  H05K2201/0341 ,  H05K2201/09472 ,  H05K2201/10674 ,  H05K2203/0353 ,  H05K2203/0361 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/1184 ,  Y10T29/49155 ,  H01L2224/0401

摘要： A wiring board includes an electrode pad having a first surface and a second surface located on an opposite side from the first surface, a conductor pattern connected to the first surface of the electrode pad, and an insulator layer embedded with the electrode pad and the conductor pattern. The insulator layer covers an outer peripheral portion of the second surface of the electrode pad.

摘要翻译： 布线基板包括具有第一表面和位于与第一表面相反一侧的第二表面的电极焊盘，连接到电极焊盘的第一表面的导体图案，以及嵌入电极焊盘和导体的绝缘体层 模式。 绝缘体层覆盖电极焊盘的第二表面的外周部。

公开(公告)号：US09084379B2

公开(公告)日：2015-07-14

申请号：US13423578

申请日：2012-03-19

申请人： Tsung-Yuan Chen ,  Chun-Chien Chen ,  Cheng-Po Yu

发明人： Tsung-Yuan Chen ,  Chun-Chien Chen ,  Cheng-Po Yu

IPC分类号： H01K3/10 ,  H05K3/00 ,  H05K3/36 ,  H05K1/00 ,  H05K1/14 ,  H05K3/42 ,  H05K3/20

CPC分类号： H05K3/428 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/20 ,  H05K3/205 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/0969 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0554 ,  H05K2203/108 ,  H05K2203/1476 ,  Y10T29/49124 ,  Y10T29/49126

摘要： A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.

摘要翻译： 提供一种制造布线板的工艺。 在该过程中，形成包括携带衬底和布线层的布线承载衬底。 接下来，在布线承载基板中形成至少一个盲孔。 接下来，通过绝缘层将布线承载基板层叠到另一布线承载基板。 绝缘层设置在布线基板的布线层之间，并且完全填充盲孔。 接下来，去除部分搬运基板以露出盲孔中的绝缘层。 接下来，形成连接在布线层之间的导电柱。 接下来，其余的携带衬底被去除。

公开(公告)号：US20130058055A1

公开(公告)日：2013-03-07

申请号：US13665977

申请日：2012-11-01

申请人： Murata Manufacturing Co., Ltd.

发明人： Yuki YAMAMOTO

IPC分类号： H05K1/00 ,  H05K7/00 ,  H05K1/09

CPC分类号： H05K3/284 ,  H05K1/111 ,  H05K1/113 ,  H05K3/205 ,  H05K2201/049 ,  H05K2201/09663 ,  H05K2201/10636 ,  H05K2203/0376 ,  Y02P70/611

摘要： A substrate with a built-in component is constructed such that a resin reliably goes around a clearance provided in a lower portion of the component and is thus filled in without expansion of a clearance in a height direction when various components such as an LW reversal type chip component are to be built in. The substrate includes a component to be embedded in a resin layer, and a land electrode (a component mounting electrode) to which external electrodes of the component are to be bonded, the land electrode being provided with a concave groove extending in a transverse direction through which an uncured resin of the resin layer flows, and the uncured resin of the resin layer flows through the concave groove and sufficiently goes around a lower side of the component so that the resin is well filled in when the component in a mounting state is to be embedded in the resin layer.

摘要翻译： 具有内置部件的基板被构造成使得树脂可靠地围绕设置在部件的下部中的间隙，并且因此当诸如LW反转型的各种部件时，在高度方向上没有间隙的膨胀而被填充 芯片部件将被内置。基板包括嵌入在树脂层中的部件，以及焊接电极（部件安装电极），部件的外部电极要被接合到其上，焊盘电极设置有 在横向延伸的凹槽，树脂层的未固化树脂通过该凹槽流动，并且树脂层的未固化树脂流过凹槽，并且充分地绕组件的下侧，使得树脂充分填充在 将安装状态的部件嵌入树脂层。