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    TWO PASS TEST CASE GENERATION USING SELF-MODIFYING INSTRUCTION REPLACEMENT
    4.
    发明申请
    TWO PASS TEST CASE GENERATION USING SELF-MODIFYING INSTRUCTION REPLACEMENT 失效
    使用自我修改指示替换的两次测试案例生成

    公开(公告)号：US20110197049A1

    公开(公告)日：2011-08-11

    申请号：US12700970

    申请日：2010-02-05

    申请人： Allon Adir ,  Brad Lee Herold ,  John Martin Ludden ,  Pedro Martin-de-Nicolas ,  Charles Leverett Meissner ,  Gil Eliezer Shurek

    发明人： Allon Adir ,  Brad Lee Herold ,  John Martin Ludden ,  Pedro Martin-de-Nicolas ,  Charles Leverett Meissner ,  Gil Eliezer Shurek

    IPC分类号： G06F9/38

    CPC分类号： G06F9/3816 ,  G06F9/3005

    摘要： A test code generation technique that replaces instructions having a machine state dependent result with special redirection instructions provides generation of test code in which state dependent execution choices are made without a state model. Redirection instructions cause execution of a handler than examines the machine state and replaces the redirection instruction with a replacement instruction having a desired result resolved in accordance with the current machine state. The instructions that are replaced may be conditional branch instructions and the result a desired execution path. The examination of the machine state permits determination of a branch condition for the replacement instruction so that the next pass of the test code executes along the desired path. Alternatively, the handler can execute a jump to the branch instruction, causing immediate execution of the desired branch path. The re-direction instructions may be illegal instructions, which cause execution of an interrupt handler that performs the replacement.

    摘要翻译： 使用特殊重定向指令替代具有机器状态相关结果的指令的测试代码生成技术提供测试代码的生成，其中在不使用状态模型的情况下进行状态相关的执行选择。 重定向指令导致处理程序的执行，而不是检查机器状态，并根据当前机器状态用具有期望结果的替换指令替换重定向指令。 被替换的指令可以是条件分支指令，并且结果是可能的执行路径。 对机器状态的检查允许确定替换指令的分支条件，使得测试代码的下一遍沿着期望的路径执行。 或者，处理程序可以执行跳转到分支指令，导致立即执行所需的分支路径。 重定向指令可能是非法指令，这些指令导致执行替换的中断处理程序的执行。

    Two pass test case generation using self-modifying instruction replacement
    5.
    发明授权
    Two pass test case generation using self-modifying instruction replacement 失效
    双通测试用例生成使用自修改指令替换

    公开(公告)号：US08516229B2

    公开(公告)日：2013-08-20

    申请号：US12700970

    申请日：2010-02-05

    申请人： Allon Adir ,  Brad Lee Herold ,  John Martin Ludden ,  Pedro Martin-de-Nicolas ,  Charles Leverett Meissner ,  Gil Eliezer Shurek

    发明人： Allon Adir ,  Brad Lee Herold ,  John Martin Ludden ,  Pedro Martin-de-Nicolas ,  Charles Leverett Meissner ,  Gil Eliezer Shurek

    IPC分类号： G06F9/44

    CPC分类号： G06F9/3816 ,  G06F9/3005

    摘要： A test code generation technique that replaces instructions having a machine state dependent result with special redirection instructions provides generation of test code in which state dependent execution choices are made without a state model. Redirection instructions cause execution of a handler than examines the machine state and replaces the redirection instruction with a replacement instruction having a desired result resolved in accordance with the current machine state. The instructions that are replaced may be conditional branch instructions and the result a desired execution path. The examination of the machine state permits determination of a branch condition for the replacement instruction so that the next pass of the test code executes along the desired path. Alternatively, the handler can execute a jump to the branch instruction, causing immediate execution of the desired branch path. The re-direction instructions may be illegal instructions, which cause execution of an interrupt handler that performs the replacement.

    摘要翻译： 使用特殊重定向指令替代具有机器状态相关结果的指令的测试代码生成技术提供测试代码的生成，其中在不使用状态模型的情况下进行状态相关的执行选择。 重定向指令导致处理程序的执行，而不是检查机器状态，并根据当前机器状态用具有期望结果的替换指令替换重定向指令。 被替换的指令可以是条件分支指令，并且结果是可能的执行路径。 对机器状态的检查允许确定替换指令的分支条件，使得测试代码的下一遍沿着期望的路径执行。 或者，处理程序可以执行跳转到分支指令，导致立即执行所需的分支路径。 重定向指令可能是非法指令，这些指令导致执行替换的中断处理程序的执行。

    Method and Apparatus for Reducing Test Case Generation Time in Processor Testing
    6.
    发明申请
    Method and Apparatus for Reducing Test Case Generation Time in Processor Testing 有权
    用于降低处理器测试中测试用例生成时间的方法和设备

    公开(公告)号：US20090222647A1

    公开(公告)日：2009-09-03

    申请号：US12041071

    申请日：2008-03-03

    申请人： Guo H. Feng ,  Pedro Martin-de-Nicolas

    发明人： Guo H. Feng ,  Pedro Martin-de-Nicolas

    IPC分类号： G06F9/00

    CPC分类号： G06F9/3851 ,  G06F11/263

    摘要： A method, apparatus and computer program product are provided for use in a system that includes one or more processors, and multiple threads that are respectively associated with the one or more processors. One embodiment of the invention is directed to a method that includes the steps of generating one or more test cases, wherein each test case comprises a specified set of instructions in a specified order, and defining a plurality of thread hardware allocations, each corresponding to a different one of the threads. The thread hardware allocation corresponding to a given thread comprises a set of processor hardware resources that are allocated to the given thread for use in executing test cases. The method further includes executing a particular one of the test cases on a first thread hardware allocation, in order to provide a first set of test data, and thereafter executing the particular test case using a second thread hardware allocation, in order to provide a second set of test data.

    摘要翻译： 提供了一种方法，装置和计算机程序产品，用于包括一个或多个处理器的系统以及分别与一个或多个处理器相关联的多个线程。 本发明的一个实施例涉及一种方法，其包括以下步骤：生成一个或多个测试用例，其中每个测试用例包含指定顺序的指定指令集，并且定义多个线程硬件分配，每个对应于 不同的线程之一。 对应于给定线程的线程硬件分配包括分配给给定线程以用于执行测试用例的一组处理器硬件资源。 该方法还包括在第一线程硬件分配上执行特定的一个测试用例，以便提供第一组测试数据，然后使用第二线程硬件分配来执行特定的测试用例，以便提供第二线程硬件分配 一组测试数据。

    Method and apparatus for reducing test case generation time in processor testing
    7.
    发明授权
    Method and apparatus for reducing test case generation time in processor testing 有权
    处理器测试中减少测试用例生成时间的方法和设备

    公开(公告)号：US07836343B2

    公开(公告)日：2010-11-16

    申请号：US12041071

    申请日：2008-03-03

    申请人： Guo H. Feng ,  Pedro Martin-de-Nicolas

    发明人： Guo H. Feng ,  Pedro Martin-de-Nicolas

    IPC分类号： G06F11/00

    CPC分类号： G06F9/3851 ,  G06F11/263

    摘要： A method, apparatus and computer program product are provided for use in a system that includes one or more processors, and multiple threads that are respectively associated with the one or more processors. One embodiment of the invention is directed to a method that includes the steps of generating one or more test cases, wherein each test case comprises a specified set of instructions in a specified order, and defining a plurality of thread hardware allocations, each corresponding to a different one of the threads. The thread hardware allocation corresponding to a given thread comprises a set of processor hardware resources that are allocated to the given thread for use in executing test cases. The method further includes executing a particular one of the test cases on a first thread hardware allocation, in order to provide a first set of test data, and thereafter executing the particular test case using a second thread hardware allocation, in order to provide a second set of test data.

    摘要翻译： 提供了一种方法，装置和计算机程序产品，用于包括一个或多个处理器的系统以及分别与一个或多个处理器相关联的多个线程。 本发明的一个实施例涉及一种方法，其包括以下步骤：生成一个或多个测试用例，其中每个测试用例包含指定顺序的指定指令集，并且定义多个线程硬件分配，每个对应于 不同的线程之一。 对应于给定线程的线程硬件分配包括分配给给定线程以用于执行测试用例的一组处理器硬件资源。 该方法还包括在第一线程硬件分配上执行特定的一个测试用例，以便提供第一组测试数据，然后使用第二线程硬件分配来执行特定的测试用例，以便提供第二线程硬件分配 一组测试数据。

    System and Method of Multi-Frequency Integrated Circuit Testing
    8.
    发明申请
    System and Method of Multi-Frequency Integrated Circuit Testing 审中-公开
    多频集成电路测试系统与方法

    公开(公告)号：US20080282123A1

    公开(公告)日：2008-11-13

    申请号：US11746715

    申请日：2007-05-10

    申请人： Charles L. Meissner ,  Pedro Martin-de-Nicolas ,  Gerard M. Salem

    发明人： Charles L. Meissner ,  Pedro Martin-de-Nicolas ,  Gerard M. Salem

    IPC分类号： G01R31/317

    CPC分类号： G01R31/31725 ,  G01R31/31727

    摘要： A system and method of multi-frequency integrated circuit testing with a method for testing a clocked logic type integrated circuit including creating exerciser code on the integrated circuit when the integrated circuit is operating at a first frequency, switching the integrated circuit to operating at a second frequency greater than the first frequency, and running the exerciser code on the integrated circuit when the integrated circuit is operating at the second frequency.

    摘要翻译： 一种用于测试时钟逻辑型集成电路的方法的多频率集成电路测试的系统和方法，包括当集成电路以第一频率工作时在集成电路上创建训练码，将集成电路切换到第二 频率大于第一频率，并且当集成电路以第二频率操作时，在集成电路上运行训练码。