公开(公告)号：US20130027097A1

公开(公告)日：2013-01-31

申请号：US13543971

申请日：2012-07-09

申请人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewics ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

发明人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewics ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

IPC分类号： H03L7/08

CPC分类号： H03L7/0891 ,  H03L7/091

摘要： System and method providing multiple circuit paths to control characteristics of periodic signals. In one embodiment first and second detector signals are indicative of a phase and frequency differences between the output signal and a reference signal. A first input signal based on the first detector signal adjusts the phase difference. A first control signal based on the second detector signal has frequency content in high and low frequency ranges. A second input signal based on the control signal reduces the frequency difference. A second control signal based on the second detector signal has relatively low frequency content in the high frequency range. A third input signal based on the second control signal reduces the frequency difference.

摘要翻译： 提供多个电路路径以控制周期信号特性的系统和方法。 在一个实施例中，第一和第二检测器信号表示输出信号和参考信号之间的相位和频率差。 基于第一检测器信号的第一输入信号调节相位差。 基于第二检测器信号的第一控制信号具有高频和低频范围内的频率含量。 基于控制信号的第二输入信号降低了频率差。 基于第二检测器信号的第二控制信号在高频范围内具有相对低的频率含量。 基于第二控制信号的第三输入信号降低了频率差。

公开(公告)号：US20130027096A1

公开(公告)日：2013-01-31

申请号：US13543961

申请日：2012-07-09

申请人： Antonios Pialis ,  Robert Wang ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewics ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo ,  Mike Bichan

发明人： Antonios Pialis ,  Robert Wang ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewics ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo ,  Mike Bichan

IPC分类号： H03L7/08

CPC分类号： H03L7/0891 ,  H03L7/091

摘要： System and circuitry controlling characteristics of periodic signals. In one embodiment adjustment circuitry modifies periodic signal characteristic. A phase detector generates analog input signals indicative of a phase difference between the periodic signal and a reference signal. Conversion circuitry translates the analog input signals into digital signals. Signal driving circuitry, comprising a current source, provides control signals to the signal driving circuitry based on the digital signals. First input circuitry provides a first adjustment signal to the adjustment circuitry. Second input circuitry provides a second adjustment signal to the adjustment circuitry in response to the control signal. The first adjustment signal is based on input of analog signals to a circuit element in the first input circuitry to control the first adjustment signal. The second input circuitry is responsive to the control signal to provide the second adjustment signal with the digital version of the input signals.

摘要翻译： 系统和电路控制周期信号的特性。 在一个实施例中，调节电路修改周期性信号特性。 相位检测器产生指示周期信号和参考信号之间的相位差的模拟输入信号。 转换电路将模拟输入信号转换为数字信号。 包括电流源的信号驱动电路基于数字信号向信号驱动电路提供控制信号。 第一输入电路为调整电路提供第一调整信号。 第二输入电路响应于控制信号向调整电路提供第二调整信号。 第一调整信号基于对第一输入电路中的电路元件的模拟信号的输入，以控制第一调整信号。 第二输入电路响应于控制信号以向输入信号的数字版本提供第二调整信号。

公开(公告)号：US08513995B2

公开(公告)日：2013-08-20

申请号：US13543971

申请日：2012-07-09

申请人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

发明人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

IPC分类号： H03L7/06

CPC分类号： H03L7/0891 ,  H03L7/091

摘要： System and method providing multiple circuit paths to control characteristics of periodic signals. In one embodiment first and second detector signals are indicative of a phase and frequency differences between the output signal and a reference signal. A first input signal based on the first detector signal adjusts the phase difference. A first control signal based on the second detector signal has frequency content in high and low frequency ranges. A second input signal based on the control signal reduces the frequency difference. A second control signal based on the second detector signal has relatively low frequency content in the high frequency range. A third input signal based on the second control signal reduces the frequency difference.

摘要翻译： 提供多个电路路径以控制周期信号特性的系统和方法。 在一个实施例中，第一和第二检测器信号表示输出信号和参考信号之间的相位和频率差。 基于第一检测器信号的第一输入信号调节相位差。 基于第二检测器信号的第一控制信号具有高频和低频范围内的频率含量。 基于控制信号的第二输入信号降低了频率差。 基于第二检测器信号的第二控制信号在高频范围内具有相对低的频率含量。 基于第二控制信号的第三输入信号降低了频率差。

公开(公告)号：US08432203B2

公开(公告)日：2013-04-30

申请号：US13543961

申请日：2012-07-09

申请人： Antonios Pialis ,  Robert Wang ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo ,  Mike Bichan

发明人： Antonios Pialis ,  Robert Wang ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo ,  Mike Bichan

IPC分类号： H03L7/06

CPC分类号： H03L7/0891 ,  H03L7/091

摘要： System and circuitry controlling characteristics of periodic signals. In one embodiment adjustment circuitry modifies periodic signal characteristic. A phase detector generates analog input signals indicative of a phase difference between the periodic signal and a reference signal. Conversion circuitry translates the analog input signals into digital signals. Signal driving circuitry, comprising a current source, provides control signals to the signal driving circuitry based on the digital signals. First input circuitry provides a first adjustment signal to the adjustment circuitry. Second input circuitry provides a second adjustment signal to the adjustment circuitry in response to the control signal. The first adjustment signal is based on input of analog signals to a circuit element in the first input circuitry to control the first adjustment signal. The second input circuitry is responsive to the control signal to provide the second adjustment signal with the digital version of the input signals.

摘要翻译： 系统和电路控制周期信号的特性。 在一个实施例中，调节电路修改周期性信号特性。 相位检测器产生指示周期信号和参考信号之间的相位差的模拟输入信号。 转换电路将模拟输入信号转换为数字信号。 包括电流源的信号驱动电路基于数字信号向信号驱动电路提供控制信号。 第一输入电路为调整电路提供第一调整信号。 第二输入电路响应于控制信号向调整电路提供第二调整信号。 第一调整信号基于对第一输入电路中的电路元件的模拟信号的输入，以控制第一调整信号。 第二输入电路响应于控制信号以向输入信号的数字版本提供第二调整信号。

公开(公告)号：US20130027119A1

公开(公告)日：2013-01-31

申请号：US13543982

申请日：2012-07-09

申请人： Rajeevan Mahadevan ,  Antonios Pialis ,  Robert Wang ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

发明人： Rajeevan Mahadevan ,  Antonios Pialis ,  Robert Wang ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

IPC分类号： H03L5/00

CPC分类号： H03L7/0891 ,  H03L7/091

摘要： A system and method providing power supply rejection. One embodiment provides for power supply rejection in PLL or DLL circuitry. First subcircuitry provides second subcircuitry a supply voltage which is a filtered version of power from an external source. The first subcircuitry includes a first field effect transistor and a first low pass filter coupled to receive a signal from the external power source during operation of the second subcircuitry. The filter is coupled to provide a filtered version of the power source signal to the gate of the first transistor, so that when a first source/drain region of the first transistor is connected to receive power from the external source and the gate of the first transistor receives the filtered version of the power source signal, the second source/drain region of the first transistor provides a first modified version of the power received from the external source.

摘要翻译： 提供电源拒绝的系统和方法。 一个实施例提供PLL或DLL电路中的电源抑制。 第一个子电路提供第二个子电路，一个电源电压，它是一个来自外部电源的滤波器的电源。 第一子电路包括第一场效应晶体管和第一低通滤波器，其被耦合以在第二子电路的操作期间从外部电源接收信号。 滤波器被耦合以将电源信号的滤波版本提供给第一晶体管的栅极，使得当第一晶体管的第一源极/漏极区域被连接以从外部源和第一晶体管的栅极接收功率时 晶体管接收电源信号的滤波版本，第一晶体管的第二源极/漏极区域提供从外部源接收的功率的第一修改版本。

公开(公告)号：US08829982B2

公开(公告)日：2014-09-09

申请号：US13543982

申请日：2012-07-09

申请人： Rajeevan Mahadevan ,  Antonios Pialis ,  Robert Wang ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

发明人： Rajeevan Mahadevan ,  Antonios Pialis ,  Robert Wang ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

IPC分类号： G05F1/10 ,  H03L7/089 ,  H03L7/091

CPC分类号： H03L7/0891 ,  H03L7/091

摘要： A system and method providing power supply rejection. One embodiment provides for power supply rejection in PLL or DLL circuitry. First subcircuitry provides second subcircuitry a supply voltage which is a filtered version of power from an external source. The first subcircuitry includes a first field effect transistor and a first low pass filter coupled to receive a signal from the external power source during operation of the second subcircuitry. The filter is coupled to provide a filtered version of the power source signal to the gate of the first transistor, so that when a first source/drain region of the first transistor is connected to receive power from the external source and the gate of the first transistor receives the filtered version of the power source signal, the second source/drain region of the first transistor provides a first modified version of the power received from the external source.

摘要翻译： 提供电源拒绝的系统和方法。 一个实施例提供PLL或DLL电路中的电源抑制。 第一个子电路提供第二个子电路，一个电源电压，它是一个来自外部电源的滤波器的电源。 第一子电路包括第一场效应晶体管和第一低通滤波器，其被耦合以在第二子电路的操作期间从外部电源接收信号。 滤波器被耦合以将电源信号的滤波版本提供给第一晶体管的栅极，使得当第一晶体管的第一源极/漏极区域被连接以从外部源和第一晶体管的栅极接收功率时 晶体管接收电源信号的滤波版本，第一晶体管的第二源极/漏极区域提供从外部源接收的功率的第一修改版本。

公开(公告)号：US08581644B2

公开(公告)日：2013-11-12

申请号：US13543975

申请日：2012-07-09

申请人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

发明人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

IPC分类号： H03L7/06

CPC分类号： H03L7/0891 ,  H03L7/091

摘要： A system incorporating and method of operating phase locked loop circuitry. In one embodiment, having programmable circuitry for adjustment of loop dynamics, a VCO has a first input terminal for selecting phase and frequency characteristics of an output signal and an output terminal on which the output signal is provided. A detector generates first VCO input signals indicative of phase and frequency differences between the VCO output signal and a reference signal. Circuitry digitizes the first VCO input signals and generates an integral path input signal therefrom. Slow integral path circuitry comprising, a first transistor device and a programmable low pass filter: receives the integral path input signal, and provides a low pass filtered version of the integral path input signal to control conduction through the first transistor device and provide a first adjustment signal for adjustment of the frequency of the VCO output signal.

摘要翻译： 一种结合操作锁相环电路的系统和方法。 在一个实施例中，具有用于调整环路动态特性的可编程电路，VCO具有用于选择输出信号的相位和频率特性的第一输入端和输出信号所在的输出端。 检测器产生指示VCO输出信号和参考信号之间的相位和频率差的第一VCO输入信号。 电路对第一个VCO输入信号进行数字化，并从中产生一个积分路径输入信号。 缓慢积分路径电路包括：第一晶体管器件和可编程低通滤波器：接收积分路径输入信号，并提供积分路径输入信号的低通滤波版本，以控制通过第一晶体管器件的导通，并提供第一调整 用于调节VCO输出信号频率的信号。

公开(公告)号：US20130027098A1

公开(公告)日：2013-01-31

申请号：US13543975

申请日：2012-07-09

申请人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

发明人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

IPC分类号： H03L7/08

CPC分类号： H03L7/0891 ,  H03L7/091

摘要： A system incorporating and method of operating phase locked loop circuitry. In one embodiment, having programmable circuitry for adjustment of loop dynamics, a VCO has a first input terminal for selecting phase and frequency characteristics of an output signal and an output terminal on which the output signal is provided. A detector generates first VCO input signals indicative of phase and frequency differences between the VCO output signal and a reference signal. Circuitry digitizes the first VCO input signals and generates an integral path input signal therefrom. Slow integral path circuitry comprising, a first transistor device and a programmable low pass filter: receives the integral path input signal, and provides a low pass filtered version of the integral path input signal to control conduction through the first transistor device and provide a first adjustment signal for adjustment of the frequency of the VCO output signal.

摘要翻译： 一种结合操作锁相环电路的系统和方法。 在一个实施例中，具有用于调整环路动态特性的可编程电路，VCO具有用于选择输出信号的相位和频率特性的第一输入端和输出信号所在的输出端。 检测器产生指示VCO输出信号和参考信号之间的相位和频率差的第一VCO输入信号。 电路对第一个VCO输入信号进行数字化，并从中产生一个积分路径输入信号。 缓慢积分路径电路包括：第一晶体管器件和可编程低通滤波器：接收积分路径输入信号，并提供积分路径输入信号的低通滤波版本，以控制通过第一晶体管器件的导通，并提供第一调整 用于调节VCO输出信号频率的信号。

公开(公告)号：US08508270B2

公开(公告)日：2013-08-13

申请号：US13544001

申请日：2012-07-09

申请人： Navid Yaghini ,  Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen

发明人： Navid Yaghini ,  Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen

IPC分类号： H03L7/06

CPC分类号： H03L7/0891 ,  H03L7/091

摘要： Circuits and methods for controlling a VCO output signal. A filtered version of an integral path input signal controls current flow through a proportional path. An exemplary embodiment generates an integral path input signal from a digital to analog converter. First integral path circuitry includes a first transistor device and a low pass filter which provides a filtered version of the integral path input signal to a first transistor device to control conduction through the device, providing a first VCO input signal for frequency adjustment of the output signal. Proportional path switching circuitry between a supply terminal and VCO input terminal includes a second transistor device which receives the first VCO input signals to control conduction between the supply terminal and the first VCO input terminal to provide a second signal for adjustment of the phase of the VCO output signal relative to the reference signal.

摘要翻译： 用于控制VCO输出信号的电路和方法。 积分路径输入信号的滤波版本控制通过比例路径的电流。 示例性实施例从数模转换器产生积分路径输入信号。 第一积分路径电路包括第一晶体管器件和低通滤波器，其向第一晶体管器件提供积分路径输入信号的滤波版本，以控制通过器件的导通，提供用于输出信号的频率调整的第一VCO输入信号 。 电源端子和VCO输入端子之间的比例路径切换电路包括第二晶体管器件，其接收第一VCO输入信号以控制电源端子和第一VCO输入端子之间的导通，以提供用于调节VCO的相位的第二信号 输出信号相对于参考信号。

公开(公告)号：US20130027100A1

公开(公告)日：2013-01-31

申请号：US13544001

申请日：2012-07-09

申请人： Navid Yaghini ,  Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen

发明人： Navid Yaghini ,  Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen

IPC分类号： H03L7/08

CPC分类号： H03L7/0891 ,  H03L7/091

摘要： Circuits and methods for controlling a VCO output signal. A filtered version of an integral path input signal controls current flow through a proportional path. An exemplary embodiment generates an integral path input signal from a digital to analog converter. First integral path circuitry includes a first transistor device and a low pass filter which provides a filtered version of the integral path input signal to a first transistor device to control conduction through the device, providing a first VCO input signal for frequency adjustment of the output signal. Proportional path switching circuitry between a supply terminal and VCO input terminal includes a second transistor device which receives the first VCO input signals to control conduction between the supply terminal and the first VCO input terminal to provide a second signal for adjustment of the phase of the VCO output signal relative to the reference signal.

摘要翻译： 用于控制VCO输出信号的电路和方法。 积分路径输入信号的滤波版本控制通过比例路径的电流。 示例性实施例从数模转换器产生积分路径输入信号。 第一积分路径电路包括第一晶体管器件和低通滤波器，其向第一晶体管器件提供积分路径输入信号的滤波版本，以控制通过器件的导通，提供用于输出信号的频率调整的第一VCO输入信号 。 电源端子和VCO输入端子之间的比例路径切换电路包括第二晶体管器件，其接收第一VCO输入信号以控制电源端子和第一VCO输入端子之间的导通，以提供用于调节VCO的相位的第二信号 输出信号相对于参考信号。