利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

8 条记录 (耗时 0.032 秒)

    System Including Circuitry For Controlling A Characteristic of a Periodic Signal and Method for Adjusting a Signal
    2.
    发明申请
    System Including Circuitry For Controlling A Characteristic of a Periodic Signal and Method for Adjusting a Signal 有权
    包括用于控制周期信号特性的电路系统和调整信号的方法

    公开(公告)号：US20130027096A1

    公开(公告)日：2013-01-31

    申请号：US13543961

    申请日：2012-07-09

    申请人： Antonios Pialis ,  Robert Wang ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewics ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo ,  Mike Bichan

    发明人： Antonios Pialis ,  Robert Wang ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewics ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo ,  Mike Bichan

    IPC分类号： H03L7/08

    CPC分类号： H03L7/0891 ,  H03L7/091

    摘要： System and circuitry controlling characteristics of periodic signals. In one embodiment adjustment circuitry modifies periodic signal characteristic. A phase detector generates analog input signals indicative of a phase difference between the periodic signal and a reference signal. Conversion circuitry translates the analog input signals into digital signals. Signal driving circuitry, comprising a current source, provides control signals to the signal driving circuitry based on the digital signals. First input circuitry provides a first adjustment signal to the adjustment circuitry. Second input circuitry provides a second adjustment signal to the adjustment circuitry in response to the control signal. The first adjustment signal is based on input of analog signals to a circuit element in the first input circuitry to control the first adjustment signal. The second input circuitry is responsive to the control signal to provide the second adjustment signal with the digital version of the input signals.

    摘要翻译： 系统和电路控制周期信号的特性。 在一个实施例中，调节电路修改周期性信号特性。 相位检测器产生指示周期信号和参考信号之间的相位差的模拟输入信号。 转换电路将模拟输入信号转换为数字信号。 包括电流源的信号驱动电路基于数字信号向信号驱动电路提供控制信号。 第一输入电路为调整电路提供第一调整信号。 第二输入电路响应于控制信号向调整电路提供第二调整信号。 第一调整信号基于对第一输入电路中的电路元件的模拟信号的输入，以控制第一调整信号。 第二输入电路响应于控制信号以向输入信号的数字版本提供第二调整信号。

    System including circuitry for controlling a characteristic of a periodic signal and method for adjusting a signal
    4.
    发明授权
    System including circuitry for controlling a characteristic of a periodic signal and method for adjusting a signal 有权
    包括用于控制周期性信号的特性的电路的系统和用于调整信号的方法的系统

    公开(公告)号：US08432203B2

    公开(公告)日：2013-04-30

    申请号：US13543961

    申请日：2012-07-09

    申请人： Antonios Pialis ,  Robert Wang ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo ,  Mike Bichan

    发明人： Antonios Pialis ,  Robert Wang ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo ,  Mike Bichan

    IPC分类号： H03L7/06

    CPC分类号： H03L7/0891 ,  H03L7/091

    摘要： System and circuitry controlling characteristics of periodic signals. In one embodiment adjustment circuitry modifies periodic signal characteristic. A phase detector generates analog input signals indicative of a phase difference between the periodic signal and a reference signal. Conversion circuitry translates the analog input signals into digital signals. Signal driving circuitry, comprising a current source, provides control signals to the signal driving circuitry based on the digital signals. First input circuitry provides a first adjustment signal to the adjustment circuitry. Second input circuitry provides a second adjustment signal to the adjustment circuitry in response to the control signal. The first adjustment signal is based on input of analog signals to a circuit element in the first input circuitry to control the first adjustment signal. The second input circuitry is responsive to the control signal to provide the second adjustment signal with the digital version of the input signals.

    摘要翻译： 系统和电路控制周期信号的特性。 在一个实施例中，调节电路修改周期性信号特性。 相位检测器产生指示周期信号和参考信号之间的相位差的模拟输入信号。 转换电路将模拟输入信号转换为数字信号。 包括电流源的信号驱动电路基于数字信号向信号驱动电路提供控制信号。 第一输入电路为调整电路提供第一调整信号。 第二输入电路响应于控制信号向调整电路提供第二调整信号。 第一调整信号基于对第一输入电路中的电路元件的模拟信号的输入，以控制第一调整信号。 第二输入电路响应于控制信号以向输入信号的数字版本提供第二调整信号。

    System Incorporating Power Supply Rejection Circuitry and Related Method
    5.
    发明申请
    System Incorporating Power Supply Rejection Circuitry and Related Method 有权
    系统结合电源抑制电路及相关方法

    公开(公告)号：US20130027119A1

    公开(公告)日：2013-01-31

    申请号：US13543982

    申请日：2012-07-09

    申请人： Rajeevan Mahadevan ,  Antonios Pialis ,  Robert Wang ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

    发明人： Rajeevan Mahadevan ,  Antonios Pialis ,  Robert Wang ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

    IPC分类号： H03L5/00

    CPC分类号： H03L7/0891 ,  H03L7/091

    摘要： A system and method providing power supply rejection. One embodiment provides for power supply rejection in PLL or DLL circuitry. First subcircuitry provides second subcircuitry a supply voltage which is a filtered version of power from an external source. The first subcircuitry includes a first field effect transistor and a first low pass filter coupled to receive a signal from the external power source during operation of the second subcircuitry. The filter is coupled to provide a filtered version of the power source signal to the gate of the first transistor, so that when a first source/drain region of the first transistor is connected to receive power from the external source and the gate of the first transistor receives the filtered version of the power source signal, the second source/drain region of the first transistor provides a first modified version of the power received from the external source.

    摘要翻译： 提供电源拒绝的系统和方法。 一个实施例提供PLL或DLL电路中的电源抑制。 第一个子电路提供第二个子电路，一个电源电压，它是一个来自外部电源的滤波器的电源。 第一子电路包括第一场效应晶体管和第一低通滤波器，其被耦合以在第二子电路的操作期间从外部电源接收信号。 滤波器被耦合以将电源信号的滤波版本提供给第一晶体管的栅极，使得当第一晶体管的第一源极/漏极区域被连接以从外部源和第一晶体管的栅极接收功率时 晶体管接收电源信号的滤波版本，第一晶体管的第二源极/漏极区域提供从外部源接收的功率的第一修改版本。

    System incorporating power supply rejection circuitry and related method
    6.
    发明授权
    System incorporating power supply rejection circuitry and related method 有权
    具有电源抑制电路和相关方法的系统

    公开(公告)号：US08829982B2

    公开(公告)日：2014-09-09

    申请号：US13543982

    申请日：2012-07-09

    申请人： Rajeevan Mahadevan ,  Antonios Pialis ,  Robert Wang ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

    发明人： Rajeevan Mahadevan ,  Antonios Pialis ,  Robert Wang ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

    IPC分类号： G05F1/10 ,  H03L7/089 ,  H03L7/091

    CPC分类号： H03L7/0891 ,  H03L7/091

    摘要： A system and method providing power supply rejection. One embodiment provides for power supply rejection in PLL or DLL circuitry. First subcircuitry provides second subcircuitry a supply voltage which is a filtered version of power from an external source. The first subcircuitry includes a first field effect transistor and a first low pass filter coupled to receive a signal from the external power source during operation of the second subcircuitry. The filter is coupled to provide a filtered version of the power source signal to the gate of the first transistor, so that when a first source/drain region of the first transistor is connected to receive power from the external source and the gate of the first transistor receives the filtered version of the power source signal, the second source/drain region of the first transistor provides a first modified version of the power received from the external source.

    摘要翻译： 提供电源拒绝的系统和方法。 一个实施例提供PLL或DLL电路中的电源抑制。 第一个子电路提供第二个子电路，一个电源电压，它是一个来自外部电源的滤波器的电源。 第一子电路包括第一场效应晶体管和第一低通滤波器，其被耦合以在第二子电路的操作期间从外部电源接收信号。 滤波器被耦合以将电源信号的滤波版本提供给第一晶体管的栅极，使得当第一晶体管的第一源极/漏极区域被连接以从外部源和第一晶体管的栅极接收功率时 晶体管接收电源信号的滤波版本，第一晶体管的第二源极/漏极区域提供从外部源接收的功率的第一修改版本。

    System and method providing bandwidth adjustment in integral path of phase locked loop circuitry
    7.
    发明授权
    System and method providing bandwidth adjustment in integral path of phase locked loop circuitry 有权
    在锁相环电路的积分路径中提供带宽调整的系统和方法

    公开(公告)号：US08581644B2

    公开(公告)日：2013-11-12

    申请号：US13543975

    申请日：2012-07-09

    申请人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

    发明人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

    IPC分类号： H03L7/06

    CPC分类号： H03L7/0891 ,  H03L7/091

    摘要： A system incorporating and method of operating phase locked loop circuitry. In one embodiment, having programmable circuitry for adjustment of loop dynamics, a VCO has a first input terminal for selecting phase and frequency characteristics of an output signal and an output terminal on which the output signal is provided. A detector generates first VCO input signals indicative of phase and frequency differences between the VCO output signal and a reference signal. Circuitry digitizes the first VCO input signals and generates an integral path input signal therefrom. Slow integral path circuitry comprising, a first transistor device and a programmable low pass filter: receives the integral path input signal, and provides a low pass filtered version of the integral path input signal to control conduction through the first transistor device and provide a first adjustment signal for adjustment of the frequency of the VCO output signal.

    摘要翻译： 一种结合操作锁相环电路的系统和方法。 在一个实施例中，具有用于调整环路动态特性的可编程电路，VCO具有用于选择输出信号的相位和频率特性的第一输入端和输出信号所在的输出端。 检测器产生指示VCO输出信号和参考信号之间的相位和频率差的第一VCO输入信号。 电路对第一个VCO输入信号进行数字化，并从中产生一个积分路径输入信号。 缓慢积分路径电路包括：第一晶体管器件和可编程低通滤波器：接收积分路径输入信号，并提供积分路径输入信号的低通滤波版本，以控制通过第一晶体管器件的导通，并提供第一调整 用于调节VCO输出信号频率的信号。

    System and Method Providing Bandwidth Adjustment In Integral Path of Phase Locked Loop Circuitry
    8.
    发明申请
    System and Method Providing Bandwidth Adjustment In Integral Path of Phase Locked Loop Circuitry 有权
    系统和方法在锁相环电路的积分路径中提供带宽调整

    公开(公告)号：US20130027098A1

    公开(公告)日：2013-01-31

    申请号：US13543975

    申请日：2012-07-09

    申请人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

    发明人： Robert Wang ,  Antonios Pialis ,  Rajeevan Mahadevan ,  Navid Yaghini ,  Rafal Karakiewicz ,  Raymond Kwok Kei Tang ,  Sida Shen ,  Mark Andruchow ,  Zhuobin Li ,  Nicola Pantaleo

    IPC分类号： H03L7/08

    CPC分类号： H03L7/0891 ,  H03L7/091

    摘要： A system incorporating and method of operating phase locked loop circuitry. In one embodiment, having programmable circuitry for adjustment of loop dynamics, a VCO has a first input terminal for selecting phase and frequency characteristics of an output signal and an output terminal on which the output signal is provided. A detector generates first VCO input signals indicative of phase and frequency differences between the VCO output signal and a reference signal. Circuitry digitizes the first VCO input signals and generates an integral path input signal therefrom. Slow integral path circuitry comprising, a first transistor device and a programmable low pass filter: receives the integral path input signal, and provides a low pass filtered version of the integral path input signal to control conduction through the first transistor device and provide a first adjustment signal for adjustment of the frequency of the VCO output signal.

    摘要翻译： 一种结合操作锁相环电路的系统和方法。 在一个实施例中，具有用于调整环路动态特性的可编程电路，VCO具有用于选择输出信号的相位和频率特性的第一输入端和输出信号所在的输出端。 检测器产生指示VCO输出信号和参考信号之间的相位和频率差的第一VCO输入信号。 电路对第一个VCO输入信号进行数字化，并从中产生一个积分路径输入信号。 缓慢积分路径电路包括：第一晶体管器件和可编程低通滤波器：接收积分路径输入信号，并提供积分路径输入信号的低通滤波版本，以控制通过第一晶体管器件的导通，并提供第一调整 用于调节VCO输出信号频率的信号。