APPARATUS FOR CONTACTLESS TRANSMISSION OF DATA FROM A MEMORY
    4.
    发明申请
    APPARATUS FOR CONTACTLESS TRANSMISSION OF DATA FROM A MEMORY 审中-公开
    从存储器中连续传输数据的设备

    公开(公告)号:US20080144650A1

    公开(公告)日:2008-06-19

    申请号:US11954085

    申请日:2007-12-11

    IPC分类号: H04J15/00

    摘要: Apparatus for contactless data transmission according to a predetermined transmission protocol providing control information and payload for a data transmission, with a near field communicator and an interface connected to the near field communicator, the interface being operative to exchange, using a first protocol, data with the near field communicator for the contactless transmission. In this context, the first protocol provides a transmission of control information and payload, the payload of the first protocol including the control information and the payload of the predetermined protocol. The apparatus further includes a module coupled to the interface and being operative to exchange, using the payload of the first protocol, the control information and the payload of the predetermined transmission protocol for the data exchanged contactlessly by the near field communicator.

    摘要翻译: 用于根据预定传输协议提供用于数据传输的控制信息和有效载荷的无接触数据传输的装置,具有近场通信器和连接到近场通信器的接口,所述接口可操作以使用第一协议来交换数据, 用于非接触传输的近场通信器。 在这种情况下,第一协议提供控制信息和有效载荷的传输,第一协议的有效载荷包括控制信息和预定协议的有效载荷。 该装置还包括耦合到接口的模块,并且可操作地使用第一协议的有效载荷来交换由近场通信器无接触地交换的数据的预定传输协议的控制信息和有效载荷。

    Electronic device with a programmable resistive element and a method for blocking a device
    5.
    发明授权
    Electronic device with a programmable resistive element and a method for blocking a device 有权
    具有可编程电阻元件的电子设备和用于阻止设备的方法

    公开(公告)号:US08159857B2

    公开(公告)日:2012-04-17

    申请号:US12563427

    申请日:2009-09-21

    IPC分类号: G11C11/00

    摘要: One or more embodiments relate to an electronic device comprising a circuitry and a programmable resistive element. The programmable resistive element comprises a first and a second state, wherein the programmable resistive element is configured to allow switching from the second state into the first state in response to a signal comprising at least a predefined level. The circuitry is configured to provide signals up the predefined level, wherein the circuitry is configured to provide a switch signal to the programmable resistive element, wherein the switch signal causes switching from the first into the second state.

    摘要翻译: 一个或多个实施例涉及包括电路和可编程电阻元件的电子设备。 可编程电阻元件包括第一和第二状态,其中可编程电阻元件被配置为允许响应于包括至少预定义电平的信号从第二状态切换到第一状态。 该电路被配置为提供上述预定义电平的信号,其中电路被配置为向可编程电阻元件提供开关信号,其中开关信号引起从第一状态切换到第二状态。

    Circuit arrangement having a transmitter and a receiver
    6.
    发明授权
    Circuit arrangement having a transmitter and a receiver 有权
    具有发射机和接收机的电路装置

    公开(公告)号:US07457365B2

    公开(公告)日:2008-11-25

    申请号:US10923198

    申请日:2004-08-20

    IPC分类号: H04L27/00

    CPC分类号: H04K1/00 H04L9/003

    摘要: Circuit arrangement having a transmitter and a receiver coupled to the transmitter via N signal lines, wherein a useful information signal is exchanged between the transmitter and the receiver via M randomly selectable signal lines, N being greater than M.

    摘要翻译: 具有发射机和接收机经由N条信号线耦合到发射机的电路装置,其中通过M个可随机选择的信号线在发射机和接收机之间交换有用信息信号,N大于M.

    Memory element
    7.
    发明授权
    Memory element 有权
    记忆元素

    公开(公告)号:US07333358B2

    公开(公告)日:2008-02-19

    申请号:US11465209

    申请日:2006-08-17

    IPC分类号: G11C11/00

    CPC分类号: G11C11/419 G11C7/24

    摘要: A memory element having a first and second logic components, each having a first input, a second input, and an output. The first input of each of the logic components is connected to the output of the other logic component. The second inputs of each of the logic components are connected to a control line. The first and second logic components are embodied such that when a control signal having a first level is applied to the control line at the respective output, a signal is output which has an output level that is inverted with respect to the level of the signal present at the respective first input, and when a control signal having a second level is applied to the control line at the respective output, a signal is output which has a predetermined level independent of the level of the signal present at the respective first input.

    摘要翻译: 具有第一和第二逻辑组件的存储元件,每个具有第一输入,第二输入和输出。 每个逻辑组件的第一个输入连接到另一个逻辑组件的输出端。 每个逻辑部件的第二输入端连接到控制线。 第一和第二逻辑部件被实施为使得当具有第一电平的控制信号被施加到相应输出端的控制线时,输出信号,其具有相对于存在的信号的电平反相的输出电平 在相应的第一输入处,并且当具有第二电平的控制信号被施加到相应输出端的控制线时,输出具有独立于存在于相应的第一输入端的信号的电平的预定电平的信号。

    Parallel data bus
    9.
    发明申请
    Parallel data bus 审中-公开
    并行数据总线

    公开(公告)号:US20050289409A1

    公开(公告)日:2005-12-29

    申请号:US11165823

    申请日:2005-06-23

    IPC分类号: G01R31/28 G06F21/85 G11C29/00

    CPC分类号: G06F21/85

    摘要: A parallel data bus having a plurality of bus lines, and a bus mode switching device for switching between data transmission at a high data transmission rate and data transmission at high data integrity.

    摘要翻译: 具有多个总线的并行数据总线,以及用于在高数据传输速率的数据传输和高数据完整性的数据传输之间切换的总线模式切换装置。

    Communication system
    10.
    发明申请
    Communication system 审中-公开
    通讯系统

    公开(公告)号:US20050252962A1

    公开(公告)日:2005-11-17

    申请号:US11119426

    申请日:2005-04-28

    摘要: Communications system having a chip card and at least one chip card communications partner, the chip card having a module for initiating data interchange with the chip card communications partner, and a method for interchanging data between a chip card and a chip card communications partner, the chip card initiating data interchange.

    摘要翻译: 具有芯片卡和至少一个芯片卡通信伙伴的通信系统,芯片卡具有用于与芯片卡通信伙伴进行数据交换的模块,以及用于在芯片卡和芯片卡通信伙伴之间交换数据的方法, 芯片卡启动数据交换。