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    Providing accurate time-based counters for scaling operating frequencies of microprocessors
    1.
    发明授权
    Providing accurate time-based counters for scaling operating frequencies of microprocessors 失效
    提供精确的时间计数器来缩放微处理器的工作频率

    公开(公告)号：US07602874B2

    公开(公告)日：2009-10-13

    申请号：US11340449

    申请日：2006-01-26

    申请人： Rolf Hilgendorf ,  Jens Kuenzer ,  Cedric Lichtenau ,  Thomas Pflueger ,  Martin Recktenwald ,  Andreas Schmid

    发明人： Rolf Hilgendorf ,  Jens Kuenzer ,  Cedric Lichtenau ,  Thomas Pflueger ,  Martin Recktenwald ,  Andreas Schmid

    IPC分类号： H04L7/00

    CPC分类号： G06F1/14 ,  G04F10/04 ,  H03L7/06

    摘要： A mechanism provides accurate time-based counters for scaling operating frequencies of microprocessors. The mechanism makes use of a time-based counter circuit configuration in which a fixed frequency clock is derived from a PLL of the clock generation circuit of the microprocessor and is used to feed the external and internal timebase logic as well as a timebase accumulator counter. The timebase accumulator counter accumulates the tick events from the timebase logic between two core clocks. The accumulated value is transferred to the core clock domain on every clock edge of a scalable clock and the accumulator is then reset. Because the accumulated ticks are transferred to the core clock domain before the accumulator is reset, no ticks are ever lost using the circuitry of the illustrative embodiment.

    摘要翻译： 一种机制提供了精确的基于时间的计数器来缩放微处理器的工作频率。 该机制利用基于时间的计数器电路配置，其中从微处理器的时钟产生电路的PLL导出固定频率时钟，并且用于馈送外部和内部时基逻辑以及时基累加器计数器。 时基累加器计数器从两个核心时钟之间的时基逻辑累加tick事件。 累加值在可伸缩时钟的每个时钟沿传输到核心时钟域，然后累加器复位。 因为在累加器复位之前累积的刻度被传送到核心时钟域，所以使用说明性实施例的电路不会丢失任何刻度。

    Providing accurate time-based counters for scaling operating frequencies of microprocessors
    2.
    发明授权
    Providing accurate time-based counters for scaling operating frequencies of microprocessors 失效
    提供精确的时间计数器来缩放微处理器的工作频率

    公开(公告)号：US07646838B2

    公开(公告)日：2010-01-12

    申请号：US12130229

    申请日：2008-05-30

    申请人： Rolf Hilgendorf ,  Jens Kuenzer ,  Cedric Lichtenau ,  Thomas Pflueger ,  Martin Recktenwald ,  Andreas Schmid

    发明人： Rolf Hilgendorf ,  Jens Kuenzer ,  Cedric Lichtenau ,  Thomas Pflueger ,  Martin Recktenwald ,  Andreas Schmid

    IPC分类号： H04L7/00

    CPC分类号： G06F1/14 ,  G04F10/04 ,  H03L7/06

    摘要： The illustrative embodiments provide accurate time-based counters for scaling operating frequencies of microprocessors. A time-based counter circuit configuration in which a fixed frequency clock is derived from a PLL of the clock generation circuit of the microprocessor and is used to feed the external and internal timebase logic as well as a timebase accumulator counter. The timebase accumulator counter accumulates the tick events from the timebase logic between two core clocks. The accumulated value is transferred to the core clock domain on every clock edge of a scalable clock and the accumulator is then reset. Because the accumulated ticks are transferred to the core clock domain before the accumulator is reset, no ticks are ever lost using the circuitry of the illustrative embodiment.

    摘要翻译： 说明性实施例提供用于缩放微处理器的操作频率的精确的基于时间的计数器。 一种基于时间的计数器电路配置，其中固定频率时钟源自微处理器的时钟产生电路的PLL，并用于馈送外部和内部时基逻辑以及时基累加器计数器。 时基累加器计数器从两个核心时钟之间的时基逻辑累加tick事件。 累加值在可伸缩时钟的每个时钟沿传输到核心时钟域，然后累加器复位。 因为在累加器复位之前累积的刻度被传送到核心时钟域，所以使用说明性实施例的电路不会丢失任何刻度。

    Providing Accurate Time-Based Counters for Scaling Operating Frequencies of Microprocessors
    3.
    发明申请
    Providing Accurate Time-Based Counters for Scaling Operating Frequencies of Microprocessors 失效
    提供精确的基于时间的计数器来缩放微处理器的工作频率

    公开(公告)号：US20080226008A1

    公开(公告)日：2008-09-18

    申请号：US12130229

    申请日：2008-05-30

    申请人： Rolf Hilgendorf ,  Jens Kuenzer ,  Cedric Lichtenau ,  Thomas Pflueger ,  Martin Recktenwald ,  Andreas Schmid

    发明人： Rolf Hilgendorf ,  Jens Kuenzer ,  Cedric Lichtenau ,  Thomas Pflueger ,  Martin Recktenwald ,  Andreas Schmid

    IPC分类号： H04L7/00

    CPC分类号： G06F1/14 ,  G04F10/04 ,  H03L7/06

    摘要： The illustrative embodiments provide accurate time-based counters for scaling operating frequencies of microprocessors. A time-based counter circuit configuration in which a fixed frequency clock is derived from a PLL of the clock generation circuit of the microprocessor and is used to feed the external and internal timebase logic as well as a timebase accumulator counter. The timebase accumulator counter accumulates the tick events from the timebase logic between two core clocks. The accumulated value is transferred to the core clock domain on every clock edge of a scalable clock and the accumulator is then reset. Because the accumulated ticks are transferred to the core clock domain before the accumulator is reset, no ticks are ever lost using the circuitry of the illustrative embodiment.

    摘要翻译： 说明性实施例提供用于缩放微处理器的操作频率的精确的基于时间的计数器。 一种基于时间的计数器电路配置，其中固定频率时钟源自微处理器的时钟产生电路的PLL，并用于馈送外部和内部时基逻辑以及时基累加器计数器。 时基累加器计数器从两个核心时钟之间的时基逻辑累加tick事件。 累加值在可伸缩时钟的每个时钟沿传输到核心时钟域，然后累加器复位。 因为在累加器复位之前累积的刻度被传送到核心时钟域，所以使用说明性实施例的电路不会丢失任何刻度。

    System, apparatus and method of providing accurate time-based counters for scaling operating frequencies of microprocessors
    4.
    发明申请
    System, apparatus and method of providing accurate time-based counters for scaling operating frequencies of microprocessors 失效
    提供精确的基于时间的计数器的系统，装置和方法，用于缩放微处理器的工作频率

    公开(公告)号：US20070172010A1

    公开(公告)日：2007-07-26

    申请号：US11340449

    申请日：2006-01-26

    申请人： Rolf Hilgendorf ,  Jens Kuenzer ,  Cedric Lichtenau ,  Thomas Pflueger ,  Martin Recktenwald ,  Andreas Schmid

    发明人： Rolf Hilgendorf ,  Jens Kuenzer ,  Cedric Lichtenau ,  Thomas Pflueger ,  Martin Recktenwald ,  Andreas Schmid

    IPC分类号： H04L7/00

    CPC分类号： G06F1/14 ,  G04F10/04 ,  H03L7/06

    摘要： The illustrative embodiments provide a system, apparatus and method for providing accurate time-based counters for scaling operating frequencies of microprocessors. The system, apparatus and method make use of a time-based counter circuit configuration in which a fixed frequency clock is derived from a PLL of the clock generation circuit of the microprocessor and is used to feed the external and internal timebase logic as well as a timebase accumulator counter. The timebase accumulator counter accumulates the tick events from the timebase logic between two core clocks. The accumulated value is transferred to the core clock domain on every clock edge of a scalable clock and the accumulator is then reset. Because the accumulated ticks are transferred to the core clock domain before the accumulator is reset, no ticks are ever lost using the circuitry of the illustrative embodiment.

    摘要翻译： 说明性实施例提供了一种用于提供用于缩放微处理器的操作频率的精确的基于时间的计数器的系统，装置和方法。 系统，装置和方法利用基于时间的计数器电路配置，其中固定频率时钟源自微处理器的时钟产生电路的PLL，并用于馈送外部和内部时基逻辑以及 时基累加器计数器。 时基累加器计数器从两个核心时钟之间的时基逻辑累加tick事件。 累加值在可伸缩时钟的每个时钟沿传输到核心时钟域，然后累加器复位。 因为在累加器复位之前累积的刻度被传送到核心时钟域，所以使用说明性实施例的电路不会丢失任何刻度。

    Method for the Separation of Polarizable Bioparticles
    5.
    发明申请
    Method for the Separation of Polarizable Bioparticles 有权
    分离极化生物颗粒的方法

    公开(公告)号：US20150122653A1

    公开(公告)日：2015-05-07

    申请号：US14116643

    申请日：2012-05-09

    申请人： Andreas Schmid ,  Lars M. Blank ,  Steffen Howitz ,  Frederik Sven Ole Fritzsch

    发明人： Andreas Schmid ,  Lars M. Blank ,  Steffen Howitz ,  Frederik Sven Ole Fritzsch

    IPC分类号： B03C5/00 ,  B81B7/02 ,  B01L3/00

    CPC分类号： B03C5/005 ,  B01L3/50273 ,  B01L2400/0424 ,  B03C5/026 ,  B03C2201/26 ,  B81B7/02

    摘要： The invention relates to a method for the separation of a polarisable bioparticle comprising the steps: a) dielectrophoretic preseparation of a polarisable bioparticle from a suspension of bioparticles; b) fluidic separation of the selected bioparticle by fixing the bioparticle in a dielectrophoretic field cage and circulating fluid around the bioparticle; c) transferring the separated bioparticle from the dielectrophoretic field cage to a culture chamber; d) dielectrophoretic fixing of the separated bioparticle in the culture chamber and study, observation, manipulation and/or culturing of the separated bioparticle. The invention further relates to a microfluidic system and use thereof.

    摘要翻译： 本发明涉及一种用于分离可极化生物颗粒的方法，包括以下步骤：a）从生物颗粒的悬浮液中介导电泳分离可偏振的生物颗粒; b）通过将生物颗粒固定在介电电泳场笼中并在生物颗粒周围循环流体来流体分离所选择的生物颗粒; c）将分离的生物颗粒从介电泳场笼转移到培养室; d）分离的生物颗粒在培养室中的介电泳固定，并研究，观察，操作和/或培养分离的生物颗粒。 本发明还涉及微流体系统及其用途。

    Position signal receiver
    7.
    发明授权
    Position signal receiver 失效
    位置信号接收器

    公开(公告)号：US08412094B2

    公开(公告)日：2013-04-02

    申请号：US12816304

    申请日：2010-06-15

    申请人： Andreas Schmid ,  Stefan Van Waasen

    发明人： Andreas Schmid ,  Stefan Van Waasen

    IPC分类号： H04H20/74

    CPC分类号： H04B1/406 ,  G01S1/245 ,  G01S19/36

    摘要： Apparatuses are described and disclosed which operate in a first mode to receive non-position signals, for example FM radio signals, and in a second mode of operation to receive land-based position signals, for example LORAN signals.

    摘要翻译： 描述和公开了以第一模式操作以接收非位置信号（例如FM无线电信号）以及在第二操作模式中接收基于陆地的位置信号（例如LORAN信号）的装置。

    Device for guiding two sub-assemblies of a motor vehicle which are displaceable in relation to one another, in particular of a motor vehicle seat, in a guide direction
    10.
    发明授权
    Device for guiding two sub-assemblies of a motor vehicle which are displaceable in relation to one another, in particular of a motor vehicle seat, in a guide direction 有权
    用于引导机动车辆的两个子组件的装置，其可相对于彼此，特别是机动车辆座椅在引导方向上可移动

    公开(公告)号：US07404537B2

    公开(公告)日：2008-07-29

    申请号：US10580760

    申请日：2004-11-16

    申请人： Bernhard Schrimpl ,  Andreas Schmid ,  Martin Schwarz ,  Günther Fletzberger

    发明人： Bernhard Schrimpl ,  Andreas Schmid ,  Martin Schwarz ,  Günther Fletzberger

    IPC分类号： F16M13/00

    CPC分类号： B60N2/0284 ,  B60N2/06 ,  B60N2/07 ,  B60N2/1625 ,  B60N2/163 ,  B60N2/22 ,  B60N2/929

    摘要： A device for guiding two sub-assemblies of a motor vehicle displaceable in relation to one another. Said device comprises two guide elements positioned at a distance from one another in a transversal direction that is perpendicular to the guide direction and two guide units, in which a respective guide element is mounted so that it is displaceable in the guide direction. The guide elements are intercoupled and stops are allocated to the guide elements on the guide units, said stops limiting a displacement of the guide elements in relation to the respective guide units in the transversal direction, perpendicular to the guide direction. A first of the two guide elements in the allocated guide unit is mounted perpendicularly to the guide direction with a negligible displacement margin. The second guide element is mounted in the allocated guide unit with a greater displacement margin in the transversal direction.

    摘要翻译： 用于引导可相对于彼此移动的机动车辆的两个子组件的装置。 所述装置包括两个引导元件，两个引导元件在垂直于引导方向的横向彼此相隔一定距离，以及两个导向单元，其中相应的引导元件被安装成使得其可沿引导方向移位。 引导元件相互配合，并且止动件被分配到引导单元上的引导元件，所述止挡件限制引导元件相对于相应引导单元在垂直于引导方向的横向方向上的位移。 分配的引导单元中的两个引导元件中的第一个垂直于引导方向安装，具有可忽略的位移余量。 第二引导元件以横向方向具有较大的位移裕度安装在分配的引导单元中。