公开(公告)号：US4870566A

公开(公告)日：1989-09-26

申请号：US644889

申请日：1984-08-27

申请人： Ronald J. Cooper ,  Mario A. Marsico ,  Richard C. Matlack, Jr. ,  John C. Pescatore ,  Robert L. Smith, Jr.

发明人： Ronald J. Cooper ,  Mario A. Marsico ,  Richard C. Matlack, Jr. ,  John C. Pescatore ,  Robert L. Smith, Jr.

IPC分类号： G06F11/00 ,  G06F11/10 ,  G06F11/22 ,  G06F11/267 ,  G06F11/273 ,  G06F13/00 ,  G06F13/12 ,  G06F13/26 ,  G06F13/28 ,  G06F13/32 ,  G06F13/364 ,  H04L5/22 ,  H04L29/00 ,  H04L29/02

CPC分类号： G06F11/2221 ,  G06F11/00 ,  G06F13/124 ,  G06F13/26 ,  G06F13/28 ,  G06F13/364 ,  G06F11/10 ,  G06F11/2205 ,  G06F11/2294

摘要： A communications concentrator and message multiplexer featuring direct access from the communications adapters to main memory via direct memory access means which eliminates the usual scanner or polling facility in a concentrator or multiplexer is described. A control microprocessor manages the allocation of memory, the conversion of message protocols and the servicing of interrupts to a plurality of port interface adapter microprocessors. The interface adapter microprocessors directly set up and control the DMA operation instead of having the DMA operation controlled by the control processor. One of the port adapters serves as a service adapter over a dedicated interface allowing a remote disgnostician access to internal registers in the control processor system, access to a dedicated read only storage for servicing, and logical interface to the main control processor for the purpose of entering instructions and directing functional operations to test each component of the system.

摘要翻译： 描述了一种通信集中器和消息多路复用器，其特征在于通过直接存储器访问装置直接从通信适配器访问主存储器，其消除了集中器或多路复用器中通常的扫描器或轮询设备。 控制微处理器管理存储器的分配，消息协议的转换和中断服务到多个端口接口适配器微处理器。 接口适配器微处理器直接设置和控制DMA操作，而不是由控制处理器控制DMA操作。 其中一个端口适配器通过专用接口用作服务适配器，允许远程监控员访问控制处理器系统中的内部寄存器，访问专用的只读存储器进行维修，以及与主控制器的逻辑接口，用于 输入指令并指导功能操作来测试系统的每个组件。

公开(公告)号：US4745600A

公开(公告)日：1988-05-17

申请号：US851253

申请日：1986-04-14

申请人： Alexander Herman ,  Robert L. Smith, Jr.

发明人： Alexander Herman ,  Robert L. Smith, Jr.

IPC分类号： H04L12/413 ,  H04J3/16 ,  H04J3/12

CPC分类号： H04L12/40163 ,  H04L12/4135

摘要： A technique for regulating the transmission of messages initiated simultaneously by a plurality of nodes of a network, in which clock intervals are established for the network, a sequence of digital values is included in each message and is transmitted to the medium at the rate of one digital value per clock interval, the sequences included in messages that are initiated at the same time by more than one node are transmitted in the same sequence of clock intervals, the presence on the medium of a selected digital value during any clock interval in which a node is transmitting a different digital value within the sequence of a message is detected, and the transmission of the message is interrupted by the node upon such detection, without corrupting another node's transmission.

摘要翻译： 一种用于调节由网络建立时钟间隔的网络的多个节点同时发送的消息的传输的技术包括数字值序列，并以一个速率被传送到媒体 每个时钟间隔的数字值，包括在由多于一个节点同时发起的消息中的序列以相同的时钟间隔序列发送，在任何时钟间隔期间在所选择的数字值的介质上的存在，其中 节点在检测到消息的序列内发送不同的数字值，并且在这种检测时消息的传输被节点中断，而不会破坏另一个节点的传输。