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公开(公告)号：US20080094405A1
公开(公告)日：2008-04-24
申请号：US11957358
申请日：2007-12-14
申请人： Rui BASTOS , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
发明人： Rui BASTOS , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
IPC分类号： G06F15/80
CPC分类号： G06T15/005
摘要： A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.
摘要翻译： 公开了可扩展着色器架构。 根据该架构，着色器包括多个着色器管线，每个着色器管线可以对光栅化像素数据执行处理操作。 着色器管线可以根据需要进行功能删除，从而防止着色器流水线造成芯片排斥。 着色器包括着色器分配器，用于处理光栅化的像素数据，然后有选择地将经处理的光栅化像素数据分配到各种着色器管线，有利于平衡工作负载。 着色器收集器将各种着色器管线的输出格式化为正确的顺序，以形成阴影像素数据。 着色器指令处理器（调度器）对各个着色器管线进行编程，以执行其预期任务。 每个着色器管道具有与着色器分配器和着色器指令处理器交互的着色器网守，使得通过着色器管线的像素数据被根据需要被控制和处理。
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公开(公告)号：US20050225554A1
公开(公告)日：2005-10-13
申请号：US10938042
申请日：2004-09-10
申请人： Rui Bastos , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
发明人： Rui Bastos , Karim Abdalla , Christian Rouet , Michael Toksvig , Johnny Rhoades , Roger Allen , John Tynefield , Emmett Kilgariff , Gary Tarolli , Brian Cabral , Craig Wittenbrink , Sean Treichler
CPC分类号： G06T15/005
摘要： A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.
摘要翻译： 公开了可扩展着色器架构。 根据该架构，着色器包括多个着色器管线，每个着色器管线可以对光栅化像素数据执行处理操作。 着色器管线可以根据需要进行功能删除，从而防止着色器流水线造成芯片排斥。 着色器包括一个着色器分配器，用于处理光栅化的像素数据，然后有选择地将经处理的光栅化像素数据分配到各种着色器管道，有利于平衡工作负载。 着色器收集器将各种着色器管线的输出格式化为正确的顺序，以形成阴影像素数据。 着色器指令处理器（调度器）对各个着色器管线进行编程，以执行其预期任务。 每个着色器管道具有与着色器分配器和着色器指令处理器交互的着色器网守，使得通过着色器管线的像素数据被根据需要被控制和处理。
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公开(公告)号：US20070008336A1
公开(公告)日：2007-01-11
申请号：US11532069
申请日：2006-09-14
申请人： Rui Bastos , Michael Toksvig , Karim Abdalla
发明人： Rui Bastos , Michael Toksvig , Karim Abdalla
IPC分类号： G09G5/00
CPC分类号： G06T3/40
摘要： A pixel center position that is not covered by a primitive covering a portion of the pixel is displaced to lie within a fragment formed by the intersection of the primitive and the pixel. X,y coordinates of a pixel center are adjusted to displace the pixel center position to lie within the fragment, affecting actual texture map coordinates or barycentric weights. Alternatively, a centroid sub-pixel sample position is determined based on coverage data for the pixel and a multisample mode. The centroid sub-pixel sample position is used to compute pixel or sub-pixel parameters for the fragment.
摘要翻译： 未被覆盖像素的一部分的原图覆盖的像素中心位置被移位以位于由图元和像素的交点形成的片段内。 调整像素中心的X，Y坐标以使像素中心位置位于片段内，影响实际纹理图坐标或重心权重。 或者，基于像素的覆盖数据和多采样模式来确定质心子像素采样位置。 质心子像素采样位置用于计算片段的像素或子像素参数。
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公开(公告)号：US20060077209A1
公开(公告)日：2006-04-13
申请号：US10960857
申请日：2004-10-07
申请人： Rui Bastos , Michael Toksvig , Karim Abdalla
发明人： Rui Bastos , Michael Toksvig , Karim Abdalla
IPC分类号： G09G5/00
CPC分类号： G06T3/40
摘要： A pixel center position that is not covered by a primitive covering a portion of the pixel is displaced to lie within a fragment formed by the intersection of the primitive and the pixel. X,y coordinates of a pixel center are adjusted to displace the pixel center position to lie within the fragment, affecting actual texture map coordinates or barycentric weights. Alternatively, a centroid sub-pixel sample position is determined based on coverage data for the pixel and a multisample mode. The centroid sub-pixel sample position is used to compute pixel or sub-pixel parameters for the fragment.
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公开(公告)号：US08698823B2
公开(公告)日：2014-04-15
申请号：US12420751
申请日：2009-04-08
申请人： Michael Toksvig , Erik Lindholm
发明人： Michael Toksvig , Erik Lindholm
摘要： A system and method for facilitating increased graphics processing without deadlock. Embodiments of the present invention provide storage for execution unit pipeline results (e.g., texture pipeline results). The storage allows increased processing of multiple threads as a texture unit may be used to store information while corresponding locations of the register file are available for reallocation to other threads. Embodiments further provide for preventing deadlock by limiting the number of requests and ensuring that a set of requests is not issued unless there are resources available to complete each request of the set of requests. Embodiments of the present invention thus provide for deadlock free increased performance.
摘要翻译： 一种用于促进没有死锁的图形处理的系统和方法。 本发明的实施例提供了执行单元流水线结果（例如，纹理流水线结果）的存储。 存储允许增加多个线程的处理，因为纹理单元可用于存储信息，而寄存器文件的相应位置可用于重新分配给其他线程。 实施例进一步提供通过限制请求的数量来防止死锁，并确保不发出一组请求，除非有可用的资源来完成该组请求的每个请求。 因此，本发明的实施例提供了无死锁增加的性能。
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6.发明授权公开(公告)号：US07301542B1
公开(公告)日：2007-11-27
申请号：US10954548
申请日：2004-09-29
CPC分类号： G09G5/395 , G06T5/20 , G09G5/391 , G09G2340/02
摘要： A graphics processing system performs filtering of oversampled data during a scanout operation. Sample values are read from an oversampled frame buffer and filtered during scanout; the filtered color values (one per pixel) are provided to a display device without an intervening step of storing the filtered data in a frame buffer. In one embodiment, the filtering circuit includes a memory interface configured to read data values corresponding to sample points from a frame buffer containing the oversampled data; and a filter configured to receive the data values provided by the memory interface, to compute a pixel value from the data values, and to transmit the pixel value for displaying by a display device, wherein the filter computes the pixel value during a scanout operation.
摘要翻译： 图形处理系统在扫描输出操作期间对过采样数据执行滤波。 从过采样帧缓冲区中读取采样值，并在扫描期间进行滤波; 滤波后的颜色值（每像素一个）被提供给显示设备，而没有将经滤波的数据存储在帧缓冲器中的中间步骤。 在一个实施例中，滤波电路包括被配置为从包含过采样数据的帧缓冲器读取对应于采样点的数据值的存储器接口; 以及滤波器，被配置为接收由所述存储器接口提供的数据值，以从所述数据值计算像素值，并且传输所述像素值以供显示设备显示，其中，所述滤波器在扫描输出操作期间计算所述像素值。
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7.发明授权公开(公告)号：US06870542B2
公开(公告)日：2005-03-22
申请号：US10187111
申请日：2002-06-28
CPC分类号： G09G5/395 , G06T5/20 , G09G5/391 , G09G2340/02
摘要： A graphics processing system performs filtering of oversampled data during a scanout operation. Sample values are read from an oversampled frame buffer and filtered during scanout; the filtered color values (one per pixel) are provided to a display device without an intervening step of storing the filtered data in a frame buffer. In one embodiment, the filtering circuit includes a memory interface configured to read data values corresponding to sample points from a frame buffer containing the oversampled data; and a filter configured to receive the data values provided by the memory interface, to compute a pixel value from the data values, and to transmit the pixel value for displaying by a display device, wherein the filter computes the pixel value during a scanout operation.
摘要翻译： 图形处理系统在扫描输出操作期间对过采样数据执行滤波。 从过采样帧缓冲区中读取采样值，并在扫描期间进行滤波; 滤波后的颜色值（每像素一个）被提供给显示设备，而没有将经滤波的数据存储在帧缓冲器中的中间步骤。 在一个实施例中，滤波电路包括被配置为从包含过采样数据的帧缓冲器读取对应于采样点的数据值的存储器接口; 以及滤波器，被配置为接收由所述存储器接口提供的数据值，以从所述数据值计算像素值，并且传输所述像素值以供显示设备显示，其中，所述滤波器在扫描输出操作期间计算所述像素值。
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公开(公告)号：US20100259536A1
公开(公告)日：2010-10-14
申请号：US12420751
申请日：2009-04-08
申请人： Michael Toksvig , Erik Lindholm
发明人： Michael Toksvig , Erik Lindholm
IPC分类号： G06T1/00
摘要： A system and method for facilitating increased graphics processing without deadlock. Embodiments of the present invention provide storage for execution unit pipeline results (e.g., texture pipeline results). The storage allows increased processing of multiple threads as a texture unit may be used to store information while corresponding locations of the register file are available for reallocation to other threads. Embodiments further provide for preventing deadlock by limiting the number of requests and ensuring that a set of requests is not issued unless there are resources available to complete each request of the set of requests. Embodiments of the present invention thus provide for deadlock free increased performance.
摘要翻译： 一种用于促进没有死锁的图形处理的系统和方法。 本发明的实施例提供了执行单元流水线结果（例如，纹理流水线结果）的存储。 存储允许增加多个线程的处理，因为纹理单元可用于存储信息，而寄存器文件的相应位置可用于重新分配给其他线程。 实施例进一步提供通过限制请求的数量来防止死锁，并确保不发出一组请求，除非有可用的资源来完成该组请求的每个请求。 因此，本发明的实施例提供了无死锁增加的性能。
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