公开(公告)号：US08423700B2

公开(公告)日：2013-04-16

申请号：US12771670

申请日：2010-04-30

申请人： Ruston Panabaker ,  Jack Creasey

发明人： Ruston Panabaker ,  Jack Creasey

IPC分类号： G06F12/00 ,  G06F13/00

CPC分类号： G06F12/06 ,  G06F12/0638 ,  G06F2212/2022 ,  G06F2212/205 ,  G11C7/10 ,  G11C8/12 ,  G11C11/005 ,  G11C2207/104

摘要： Described is a technology by which a memory controller is a component of a hybrid memory device having different types of memory therein (e.g., SDRAM and flash memory), in which the controller operates such that the memory device has only a single memory interface with respect to voltage and access protocols defined for one type of memory. For example, the controller allows a memory device with a standard SDRAM interface to provide access to both SDRAM and non-volatile memory with the non-volatile memory overlaid in one or more designated blocks of the volatile memory address space (or vice-versa). A command protocol maps memory pages to the volatile memory interface address space, for example, permitting a single pin compatible multi-chip package to replace an existing volatile memory device in any computing device that wants to provide non-volatile storage, while only requiring software changes to the device to access the flash.

摘要翻译： 描述了一种技术，通过该技术存储器控制器是其中具有不同类型的存储器的混合存储器件的组件（例如，SDRAM和闪存），其中控制器操作，使得存储器件仅具有相对于单个存储器接口 对一种类型的存储器定义的电压和访问协议。 例如，控制器允许具有标准SDRAM接口的存储器件提供对SDRAM和非易失性存储器的访问，其中非易失性存储器覆盖在易失性存储器地址空间的一个或多个指定块中（反之亦然） 。 命令协议将存储器页面映射到易失性存储器接口地址空间，例如，允许单引脚兼容多芯片封装替换想要提供非易失性存储器的任何计算设备中的现有易失性存储器件，同时仅需要软件 更改设备访问闪存。

公开(公告)号：US07716411B2

公开(公告)日：2010-05-11

申请号：US11449435

申请日：2006-06-07

申请人： Ruston Panabaker ,  Jack Creasey

发明人： Ruston Panabaker ,  Jack Creasey

IPC分类号： G06F12/00 ,  G06F13/00

CPC分类号： G06F12/06 ,  G06F12/0638 ,  G06F2212/2022 ,  G06F2212/205 ,  G11C7/10 ,  G11C8/12 ,  G11C11/005 ,  G11C2207/104

摘要： Described is a technology by which a memory controller is a component of a hybrid memory device having different types of memory therein (e.g., SDRAM and flash memory), in which the controller operates such that the memory device has only a single memory interface with respect to voltage and access protocols defined for one type of memory. For example, the controller allows a memory device with a standard SDRAM interface to provide access to both SDRAM and non-volatile memory with the non-volatile memory overlaid in one or more designated blocks of the volatile memory address space (or vice-versa). A command protocol maps memory pages to the volatile memory interface address space, for example, permitting a single pin compatible multi-chip package to replace an existing volatile memory device in any computing device that wants to provide non-volatile storage, while only requiring software changes to the device to access the flash.

摘要翻译： 描述了一种技术，通过该技术存储器控制器是其中具有不同类型的存储器的混合存储器件的组件（例如，SDRAM和闪存），其中控制器操作，使得存储器件仅具有相对于单个存储器接口 对一种类型的存储器定义的电压和访问协议。 例如，控制器允许具有标准SDRAM接口的存储器件提供对SDRAM和非易失性存储器的访问，其中非易失性存储器覆盖在易失性存储器地址空间的一个或多个指定块中（反之亦然） 。 命令协议将存储器页面映射到易失性存储器接口地址空间，例如，允许单引脚兼容多芯片封装替换想要提供非易失性存储器的任何计算设备中的现有易失性存储器件，同时仅需要软件 更改设备访问闪存。

公开(公告)号：US07705842B2

公开(公告)日：2010-04-27

申请号：US11330955

申请日：2006-01-11

申请人： Ruston Panabaker ,  Cenk Ergan ,  Jack Creasey

发明人： Ruston Panabaker ,  Cenk Ergan ,  Jack Creasey

IPC分类号： G06F3/038 ,  G06F1/26 ,  G09G5/00

CPC分类号： G09G3/2092 ,  G06F1/3218 ,  G09G3/3406 ,  G09G2320/08 ,  G09G2330/022 ,  G09G2330/026

摘要： Described is a technology by which a computer display may quickly resume outputting video data following its awakening from a deep sleep state. Displayed settings are maintained in a memory, such as a memory of the display, while the display is in a sleep state. The settings are associated with a token maintained by a host computer system and display. Upon a need to awaken the display to output video data, the host computer system and the display communicate the token, whereby the display may confirm whether maintained settings are still valid for actual use with the host's video signals. If still valid, the display restores the maintained display settings as actual display settings. The restoring of previously maintained display settings is ordinarily significantly faster than conventional mechanisms that are presently used to configure a display upon wakeup, resulting in the user perceiving a near-instantaneous wakeup of a display.

摘要翻译： 描述了一种技术，通过该技术，计算机显示器可以在从深睡眠状态唤醒之后快速恢复输出视频数据。 当显示器处于睡眠状态时，显示的设置保持在存储器中，例如显示器的存储器。 这些设置与主计算机系统维护的令牌和显示相关联。 当需要唤醒显示器以输出视频数据时，主计算机系统和显示器传送令牌，由此显示器可以确认维护的设置是否仍然对主机的视频信号的实际使用是有效的。 如果仍然有效，则显示屏将维护的显示设置恢复为实际显示设置。 以前保持的显示设置的恢复通常明显快于在唤醒时目前用于配置显示器的常规机制，导致用户感知到显示器的近瞬时唤醒。

公开(公告)号：US20100217924A1

公开(公告)日：2010-08-26

申请号：US12771670

申请日：2010-04-30

申请人： Ruston Panabaker ,  Jack Creasey

发明人： Ruston Panabaker ,  Jack Creasey

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/06 ,  G06F12/0638 ,  G06F2212/2022 ,  G06F2212/205 ,  G11C7/10 ,  G11C8/12 ,  G11C11/005 ,  G11C2207/104

摘要： Described is a technology by which a memory controller is a component of a hybrid memory device having different types of memory therein (e.g., SDRAM and flash memory), in which the controller operates such that the memory device has only a single memory interface with respect to voltage and access protocols defined for one type of memory. For example, the controller allows a memory device with a standard SDRAM interface to provide access to both SDRAM and non-volatile memory with the non-volatile memory overlaid in one or more designated blocks of the volatile memory address space (or vice-versa). A command protocol maps memory pages to the volatile memory interface address space, for example, permitting a single pin compatible multi-chip package to replace an existing volatile memory device in any computing device that wants to provide non-volatile storage, while only requiring software changes to the device to access the flash.

摘要翻译： 描述了一种技术，通过该技术存储器控制器是其中具有不同类型的存储器的混合存储器件的组件（例如，SDRAM和闪存），其中控制器操作，使得存储器件仅具有相对于单个存储器接口 对一种类型的存储器定义的电压和访问协议。 例如，控制器允许具有标准SDRAM接口的存储器件提供对SDRAM和非易失性存储器的访问，其中非易失性存储器覆盖在易失性存储器地址空间的一个或多个指定块中（反之亦然） 。 命令协议将存储器页面映射到易失性存储器接口地址空间，例如，允许单引脚兼容多芯片封装替换想要提供非易失性存储器的任何计算设备中的现有易失性存储器件，同时仅需要软件 更改设备访问闪存。

公开(公告)号：US20070159491A1

公开(公告)日：2007-07-12

申请号：US11330955

申请日：2006-01-11

申请人： Ruston Panabaker ,  Cenk Ergan ,  Jack Creasey

发明人： Ruston Panabaker ,  Cenk Ergan ,  Jack Creasey

IPC分类号： G09G5/36

CPC分类号： G09G3/2092 ,  G06F1/3218 ,  G09G3/3406 ,  G09G2320/08 ,  G09G2330/022 ,  G09G2330/026

摘要： Described is a technology by which a computer display may quickly resume outputting video data following its awakening from a deep sleep state. Displayed settings are maintained in a memory, such as a memory of the display, while the display is in a sleep state. The settings are associated with a token maintained by a host computer system and display. Upon a need to awaken the display to output video data, the host computer system and the display communicate the token, whereby the display may confirm whether maintained settings are still valid for actual use with the host's video signals. If still valid, the display restores the maintained display settings as actual display settings. The restoring of previously maintained display settings is ordinarily significantly faster than conventional mechanisms that are presently used to configure a display upon wakeup, resulting in the user perceiving a near-instantaneous wakeup of a display.

摘要翻译： 描述了一种技术，通过该技术，计算机显示器可以在从深睡眠状态唤醒之后快速恢复输出视频数据。 当显示器处于睡眠状态时，显示的设置保持在存储器中，例如显示器的存储器。 这些设置与主计算机系统维护的令牌和显示相关联。 当需要唤醒显示器以输出视频数据时，主计算机系统和显示器传送令牌，由此显示器可以确认维护的设置是否仍然对主机的视频信号的实际使用是有效的。 如果仍然有效，则显示屏将维护的显示设置恢复为实际显示设置。 以前保持的显示设置的恢复通常明显快于在唤醒时目前用于配置显示器的常规机制，导致用户感知到显示器的近瞬时唤醒。

公开(公告)号：US20070288683A1

公开(公告)日：2007-12-13

申请号：US11449435

申请日：2006-06-07

申请人： Ruston Panabaker ,  Jack Creasey

发明人： Ruston Panabaker ,  Jack Creasey

IPC分类号： G06F12/00

CPC分类号： G06F12/06 ,  G06F12/0638 ,  G06F2212/2022 ,  G06F2212/205 ,  G11C7/10 ,  G11C8/12 ,  G11C11/005 ,  G11C2207/104

摘要： Described is a technology by which a memory controller is a component of a hybrid memory device having different types of memory therein (e.g., SDRAM and flash memory), in which the controller operates such that the memory device has only a single memory interface with respect to voltage and access protocols defined for one type of memory. For example, the controller allows a memory device with a standard SDRAM interface to provide access to both SDRAM and non-volatile memory with the non-volatile memory overlaid in one or more designated blocks of the volatile memory address space (or vice-versa). A command protocol maps memory pages to the volatile memory interface address space, for example, permitting a single pin compatible multi-chip package to replace an existing volatile memory device in any computing device that wants to provide non-volatile storage, while only requiring software changes to the device to access the flash.

摘要翻译： 描述了一种技术，通过该技术存储器控制器是其中具有不同类型的存储器的混合存储器件的组件（例如，SDRAM和闪存），其中控制器操作，使得存储器件仅具有相对于单个存储器接口 对一种类型的存储器定义的电压和访问协议。 例如，控制器允许具有标准SDRAM接口的存储器件提供对SDRAM和非易失性存储器的访问，其中非易失性存储器覆盖在易失性存储器地址空间的一个或多个指定块中（反之亦然） 。 命令协议将存储器页面映射到易失性存储器接口地址空间，例如，允许单引脚兼容多芯片封装替换想要提供非易失性存储器的任何计算设备中的现有易失性存储器件，同时仅需要软件 更改设备访问闪存。

公开(公告)号：US08514172B2

公开(公告)日：2013-08-20

申请号：US13299121

申请日：2011-11-17

申请人： Ruston Panabaker ,  Pasquale DeMaio

发明人： Ruston Panabaker ,  Pasquale DeMaio

IPC分类号： G09G5/00

CPC分类号： G09G5/14 ,  G09G2320/106

摘要： A display manager is configured to handle the drawing of windows on one or more displays for an application differently based on detected motion information that is associated with a device. The display manager may not display windows for some applications while motion is detected, while the display manager may display windows for other applications even when motion is detected. Motion enabled applications may interact with the display manager and motion information to determine how to display windows while motion is detected.

摘要翻译： 显示管理器被配置为基于与设备相关联的检测到的运动信息来处理用于应用的一个或多个显示器上的窗口的绘图。 当检测到运动时，显示管理器可能不会显示某些应用程序的窗口，而即使检测到运动，显示管理器也可能会显示其他应用程序的窗口。 运动启用的应用程序可能与显示管理器和运动信息交互，以确定在检测到运动时如何显示窗口。

公开(公告)号：US08238938B2

公开(公告)日：2012-08-07

申请号：US12767005

申请日：2010-04-26

申请人： Ruston Panabaker ,  Pasquale DeMaio

发明人： Ruston Panabaker ,  Pasquale DeMaio

IPC分类号： H04B7/00

CPC分类号： G01S5/0284 ,  G01S5/0247 ,  G06F3/1431

摘要： Various devices may include a short-range wireless transmitter and/or one or more short-range wireless readers. When a first device including the transmitter is placed near a second device including the one or more readers, a relative location of the first device may be determined. Information regarding the relative location of the first device, may be used to facilitate use of the first device with a processing device. In one embodiment, the processing device may automatically configure itself, such that the first device may be used with the processing device. In another embodiment, the processing device may provide feedback, such as, for example, step-by-step instructions to facilitate setup and use of the first device with the processing device. In some embodiments, an application program interface may provide information about the device to an application executing on the processing device.

摘要翻译： 各种设备可以包括短距离无线发射器和/或一个或多个短距离无线读取器。 当包括发射机的第一设备放置在包括一个或多个读取器的第二设备附近时，可以确定第一设备的相对位置。 关于第一装置的相对位置的信息可以用于促进使用具有处理装置的第一装置。 在一个实施例中，处理设备可以自动地配置自身，使得第一设备可以与处理设备一起使用。 在另一个实施例中，处理设备可以提供反馈，例如逐步指令，以便于利用处理设备建立和使用第一设备。 在一些实施例中，应用程序接口可以向处理设备上执行的应用提供关于设备的信息。

公开(公告)号：US08090532B2

公开(公告)日：2012-01-03

申请号：US11957210

申请日：2007-12-14

申请人： Ivan J. Tashev ,  Jeffrey D. Couckuyt ,  Neil W. Black ,  John C. Krumm ,  Ruston Panabaker ,  Michael Lewis Seltzer

发明人： Ivan J. Tashev ,  Jeffrey D. Couckuyt ,  Neil W. Black ,  John C. Krumm ,  Ruston Panabaker ,  Michael Lewis Seltzer

IPC分类号： G01C21/00

CPC分类号： G01C21/3461 ,  G06Q30/0273

摘要： As a pedestrian travels, various difficulties can be encountered, such as traveling through an unsafe neighborhood or being in an open area that is subject to harsh temperatures. A route can be developed for a person taking into account factors that specifically affect a pedestrian. Moreover, the route can alter as a situation of a user changes; for instance, if a user wants to add a stop along a route.

摘要翻译： 作为行人旅行，可能会遇到各种困难，例如穿过不安全的社区或处于遭受严酷气候的开放区域。 考虑到特定影响行人的因素，可以为一个人开发一条路线。 此外，路由可以随着用户的变化而改变; 例如，如果用户想要沿路径添加停靠点。

公开(公告)号：US07620784B2

公开(公告)日：2009-11-17

申请号：US11450015

申请日：2006-06-09

申请人： Ruston Panabaker

发明人： Ruston Panabaker

IPC分类号： G06F12/00

CPC分类号： G06F13/1615 ,  Y02D10/14

摘要： Described is a high speed nonvolatile memory device and technology that includes a controller coupled via interfaces to sets of nonvolatile storage, such as separate flash memory chips or separate regions of a single chip. The controller includes logic that processes write requests of arbitrary size, by interleaving writes among the interfaces, including by parallel writing among the interfaces. For example, the data may be received via direct memory access (DMA) transfers. The controller maintains information to allow the interleaved data to be reassembled into its correct relative locations when read back, such as by DMA. The high speed nonvolatile memory device thus provides a hardware device and software solution that allows a personal computer to rapidly boot or resume from a reduced power state such as hibernation. The high speed nonvolatile memory device also may be used for other data storage purposes, such as caching and file storage.

摘要翻译： 描述了一种高速非易失性存储器件和技术，其包括通过与非易失性存储器组合的接口耦合的控制器，诸如单独的闪存芯片或单个芯片的单独区域。 控制器包括处理任意大小的写入请求的逻辑，通过在接口之间交错写入，包括在接口之间并行写入。 例如，可以经由直接存储器访问（DMA）传送来接收数据。 控制器维护信息，以允许交错数据在回读时被重新组装到其正确的相对位置，例如通过DMA。 因此，高速非易失性存储器件提供了硬件设备和软件解决方案，其允许个人计算机从诸如休眠的降低功率状态快速启动或恢复。 高速非易失性存储器件也可用于其他数据存储目的，例如缓存和文件存储。