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1.发明申请SEMICONDUCTOR DEVICE INCLUDING A MAGNETIC TUNNEL JUNCTION DEVICE INCLUDING A LAMINATED STRUCTURE AND MANUFACTURING METHOD THEREFOR 有权包括包括层压结构在内的磁性隧道连接装置的半导体装置及其制造方法公开(公告)号：US20120301975A1
公开(公告)日：2012-11-29
申请号：US13566739
申请日：2012-08-03
IPC分类号： H01L21/02
CPC分类号： H01L43/08 , H01L27/228 , H01L43/12
摘要： A semiconductor device having a MTJ device excellent in operating characteristics and a manufacturing method therefor are provided. The MTJ device is formed of a laminated structure which is obtained by laminating a lower magnetic film, a tunnel insulating film, and an upper magnetic film in this order. The lower and upper magnetic films contain noncrystalline or microcrystalline ferrocobalt boron (CoFeB) as a constituent material. The tunnel insulating film contains aluminum oxide (AlOx) as a constituent material. A CAP layer is formed over the upper magnetic film and a hard mask is formed over the CAP layer. The CAP layer contains a substance of crystalline ruthenium (Ru) as a constituent material and the hard mask contains a substance of crystalline tantalum (Ta) as a constituent material. The film thickness of the hard mask is larger than that of the CAP layer.
摘要翻译： 提供一种具有优异的操作特性的MTJ装置的半导体装置及其制造方法。 MTJ装置由层叠结构形成，其通过依次层叠下磁性膜，隧道绝缘膜和上磁性膜而获得。 下部和上部磁性膜含有非结晶或微晶铁硼（CoFeB）作为构成材料。 隧道绝缘膜包含氧化铝（AlOx）作为构成材料。 在上磁性膜上形成CAP层，在CAP层上形成硬掩模。 CAP层包含结晶钌（Ru）作为构成材料的物质，硬掩模含有结晶钽（Ta）作为构成材料的物质。 硬掩模的膜厚大于CAP层的膜厚。
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2.发明授权公开(公告)号：US08258592B2
公开(公告)日：2012-09-04
申请号：US12463865
申请日：2009-05-11
CPC分类号： H01L43/08 , H01L27/228 , H01L43/12
摘要： A semiconductor device having a MTJ device excellent in operating characteristics and a manufacturing method therefor are provided. The MTJ device is formed of a laminated structure which is obtained by laminating a lower magnetic film, a tunnel insulating film, and an upper magnetic film in this order. The lower and upper magnetic films contain noncrystalline or microcrystalline ferrocobalt boron (CoFeB) as a constituent material. The tunnel insulating film contains aluminum oxide (AlOx) as a constituent material. A CAP layer is formed over the upper magnetic film and a hard mask is formed over the CAP layer. The CAP layer contains a substance of crystalline ruthenium (Ru) as a constituent material and the hard mask contains a substance of crystalline tantalum (Ta) as a constituent material. The film thickness of the hard mask is larger than that of the CAP layer.
摘要翻译： 提供一种具有优异的操作特性的MTJ装置的半导体装置及其制造方法。 MTJ装置由层叠结构形成，其通过依次层叠下磁性膜，隧道绝缘膜和上磁性膜而获得。 下部和上部磁性膜含有非结晶或微晶铁硼（CoFeB）作为构成材料。 隧道绝缘膜包含氧化铝（AlOx）作为构成材料。 在上磁性膜上形成CAP层，在CAP层上形成硬掩模。 CAP层包含结晶钌（Ru）作为构成材料的物质，硬掩模含有结晶钽（Ta）作为构成材料的物质。 硬掩模的膜厚大于CAP层的膜厚。
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3.发明授权公开(公告)号：US08383427B2
公开(公告)日：2013-02-26
申请号：US13566739
申请日：2012-08-03
CPC分类号： H01L43/08 , H01L27/228 , H01L43/12
摘要： A semiconductor device having a MTJ device excellent in operating characteristics and a manufacturing method therefor are provided. The MTJ device is formed of a laminated structure which is obtained by laminating a lower magnetic film, a tunnel insulating film, and an upper magnetic film in this order. The lower and upper magnetic films contain noncrystalline or microcrystalline ferrocobalt boron (CoFeB) as a constituent material. The tunnel insulating film contains aluminum oxide (AlOx) as a constituent material. A CAP layer is formed over the upper magnetic film and a hard mask is formed over the CAP layer. The CAP layer contains a substance of crystalline ruthenium (Ru) as a constituent material and the hard mask contains a substance of crystalline tantalum (Ta) as a constituent material. The film thickness of the hard mask is larger than that of the CAP layer.
摘要翻译： 提供一种具有优异的操作特性的MTJ装置的半导体装置及其制造方法。 MTJ装置由层叠结构形成，其通过依次层叠下磁性膜，隧道绝缘膜和上磁性膜而获得。 下部和上部磁性膜含有非结晶或微晶铁硼（CoFeB）作为构成材料。 隧道绝缘膜包含氧化铝（AlOx）作为构成材料。 在上磁性膜上形成CAP层，在CAP层上形成硬掩模。 CAP层包含结晶钌（Ru）作为构成材料的物质，硬掩模含有结晶钽（Ta）作为构成材料的物质。 硬掩模的膜厚大于CAP层的膜厚。
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公开(公告)号：US20090302404A1
公开(公告)日：2009-12-10
申请号：US12463865
申请日：2009-05-11
CPC分类号： H01L43/08 , H01L27/228 , H01L43/12
摘要： A semiconductor device having an MTJ device excellent in operating characteristics and a manufacturing method therefor are obtained. The MTJ device is formed of a laminated structure obtained by laminating a lower magnetic film, a tunnel insulating film, and an upper magnetic film in this order. The lower magnetic film and the upper magnetic film contain noncrystalline or microcrystalline ferrocobalt boron (CoFeB) as a constituent material. The tunnel insulating film contains aluminum oxide (AlOx) as a constituent material. A CAP layer is formed over the upper magnetic film of the MTJ device and a hard mask is formed over the CAP layer. The CAP layer contains a simple substance of crystalline ruthenium (Ru) as a constituent material and the hard mask contains a simple substance of crystalline tantalum (Ta) as a constituent material. The hard mask is so formed that the film thickness thereof is larger than the film thickness of the CAP layer.
摘要翻译： 获得具有优异的操作特性的MTJ装置的半导体装置及其制造方法。 MTJ装置由通过依次层叠下磁性膜，隧道绝缘膜和上磁性膜获得的层叠结构形成。 下磁性膜和上磁性膜含有非结晶或微晶铁硼（CoFeB）作为构成材料。 隧道绝缘膜包含氧化铝（AlOx）作为构成材料。 在MTJ装置的上部磁性膜上形成CAP层，在CAP层上形成硬掩模。 CAP层包含结晶钌（Ru）的单一物质作为构成材料，硬掩模含有作为构成材料的结晶钽（Ta）的单一物质。 硬掩模被形成为使得其膜厚度大于CAP层的膜厚度。
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5.发明授权公开(公告)号：US08546151B2
公开(公告)日：2013-10-01
申请号：US12528854
申请日：2008-02-25
申请人： Haruo Furuta , Shuichi Ueno , Ryoji Matsuda , Tatsuya Fukumura , Takeharu Kuroiwa , Lien-Chang Wang , Eugene Chen , Yiming Huai
发明人： Haruo Furuta , Shuichi Ueno , Ryoji Matsuda , Tatsuya Fukumura , Takeharu Kuroiwa , Lien-Chang Wang , Eugene Chen , Yiming Huai
IPC分类号： H01L21/00
CPC分类号： H01L43/12 , B82Y10/00 , H01L27/228
摘要： Disclosed is a method for manufacturing a magnetic storage device comprising a TMR element, which comprises a step for forming an insulting film on an interlayer insulating film provided with a wiring layer, an opening formation step for forming an opening in the insulating film so that the wiring layer is exposed therefrom, a metal layer formation step for forming a metal layer on the insulating layer so that the opening is filled therewith, a CMP step for polishing and removing the metal layer on the insulating layer by a CMP method and forming the metal layer remaining in the opening into a lower electrode, and a step for forming a TMR element on the lower electrode. Also disclosed is a magnetic storage device comprising an interlayer insulating film provided with a wiring layer, an insulating film formed on the interlayer insulating film, an opening formed in the insulating film so that the wiring layer is exposed therefrom, a barrier metal layer provided so as to cover the inner surface of the opening, a lower electrode formed on the barrier metal so as to fill the opening, and a TMR element formed on the lower electrode.
摘要翻译： 公开了一种制造包括TMR元件的磁存储装置的方法，该方法包括在具有布线层的层间绝缘膜上形成绝缘膜的步骤，用于在绝缘膜上形成开口的开口形成步骤， 布线层暴露于其中，金属层形成步骤用于在绝缘层上形成金属层以使其开口被填充; CMP步骤，用于通过CMP方法在绝缘层上抛光和去除金属层，并形成金属 剩余在开口中的层形成下电极，以及在下电极上形成TMR元件的步骤。 还公开了一种磁存储装置，其包括设置有布线层的层间绝缘膜，形成在层间绝缘膜上的绝缘膜，形成在绝缘膜中的开口，使得布线层暴露于其中，阻挡金属层设置为 为了覆盖开口的内表面，形成在阻挡金属上以便填充开口的下电极和形成在下电极上的TMR元件。
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公开(公告)号：US20090315128A1
公开(公告)日：2009-12-24
申请号：US12549695
申请日：2009-08-28
申请人： Haruo Furuta , Ryoji Matsuda , Shuichi Ueno , Takeharu Kuroiwa
发明人： Haruo Furuta , Ryoji Matsuda , Shuichi Ueno , Takeharu Kuroiwa
IPC分类号： H01L43/00
CPC分类号： H01L43/08 , B82Y10/00 , H01L27/228 , H01L43/12
摘要： The semiconductor device which has a memory cell including the TMR film with which memory accuracy does not deteriorate, and its manufacturing method are obtained. A TMR element (a TMR film, a TMR upper electrode) is selectively formed in the region which corresponds in plan view on a TMR lower electrode in a part of formation area of a digit line. A TMR upper electrode is formed by 30-100 nm thickness of Ta, and functions also as a hard mask at the time of a manufacturing process. The interlayer insulation film formed from LT-SiN on the whole surface of a TMR element and the upper surface of a TMR lower electrode is formed, and the interlayer insulation film which covers the whole surface comprising the side surface of a TMR lower electrode, and includes LT-SiN is formed. The interlayer insulation film which covers the whole surface and includes SiO2 is formed.
摘要翻译： 具有包含记忆精度不劣化的TMR膜的存储单元的半导体装置及其制造方法。 在数字线的形成区域的一部分的TMR下电极的平面图中对应的区域选择性地形成TMR元件（TMR膜，TMR上电极）。 TMR上电极由Ta的30-100nm厚度形成，并且在制造过程中也用作硬掩模。 在TMR元件的整个表面和TMR下电极的整个表面上形成由LT-SiN形成的层间绝缘膜，覆盖包括TMR下电极的侧表面的整个表面的层间绝缘膜和 包括LT-SiN。 形成覆盖整个表面并包含SiO 2的层间绝缘膜。
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公开(公告)号：US20070108543A1
公开(公告)日：2007-05-17
申请号：US11593548
申请日：2006-11-07
申请人： Haruo Furuta , Ryoji Matsuda , Shuichi Ueno , Takeharu Kuroiwa
发明人： Haruo Furuta , Ryoji Matsuda , Shuichi Ueno , Takeharu Kuroiwa
IPC分类号： H01L43/00
CPC分类号： H01L43/08 , B82Y10/00 , H01L27/228 , H01L43/12
摘要： The semiconductor device which has a memory cell including the TMR film with which memory accuracy does not deteriorate, and its manufacturing method are obtained. A TMR element (a TMR film, a TMR upper electrode) is selectively formed in the region which corresponds in plan view on a TMR lower electrode in a part of formation area of a digit line. A TMR upper electrode is formed by 30-100 nm thickness of Ta, and functions also as a hard mask at the time of a manufacturing process. The interlayer insulation film formed from LT-SiN on the whole surface of a TMR element and the upper surface of a TMR lower electrode is formed, and the interlayer insulation film which covers the whole surface comprising the side surface of a TMR lower electrode, and includes LT-SiN is formed. The interlayer insulation film which covers the whole surface and includes SiO2 is formed.
摘要翻译： 具有包含记忆精度不劣化的TMR膜的存储单元的半导体装置及其制造方法。 在数字线的形成区域的一部分的TMR下电极的平面图中对应的区域选择性地形成TMR元件（TMR膜，TMR上电极）。 TMR上电极由Ta的30-100nm厚度形成，并且在制造过程中也用作硬掩模。 在TMR元件的整个表面和TMR下电极的整个表面上形成由LT-SiN形成的层间绝缘膜，覆盖包括TMR下电极的侧表面的整个表面的层间绝缘膜和 包括LT-SiN。 形成覆盖整个表面并包括SiO 2的层间绝缘膜。
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公开(公告)号：US07973376B2
公开(公告)日：2011-07-05
申请号：US12549695
申请日：2009-08-28
申请人： Haruo Furuta , Ryoji Matsuda , Shuichi Ueno , Takeharu Kuroiwa
发明人： Haruo Furuta , Ryoji Matsuda , Shuichi Ueno , Takeharu Kuroiwa
IPC分类号： H01L43/00
CPC分类号： H01L43/08 , B82Y10/00 , H01L27/228 , H01L43/12
摘要： The semiconductor device which has a memory cell including the TMR film with which memory accuracy does not deteriorate, and its manufacturing method are obtained. A TMR element (a TMR film, a TMR upper electrode) is selectively formed in the region which corresponds in plan view on a TMR lower electrode in a part of formation area of a digit line. A TMR upper electrode is formed by 30-100 nm thickness of Ta, and functions also as a hard mask at the time of a manufacturing process. The interlayer insulation film formed from LT-SiN on the whole surface of a TMR element and the upper surface of a TMR lower electrode is formed, and the interlayer insulation film which covers the whole surface comprising the side surface of a TMR lower electrode, and includes LT-SiN is formed. The interlayer insulation film which covers the whole surface and includes SiO2 is formed.
摘要翻译： 具有包含记忆精度不劣化的TMR膜的存储单元的半导体装置及其制造方法。 在数字线的形成区域的一部分的TMR下电极的平面图中对应的区域选择性地形成TMR元件（TMR膜，TMR上电极）。 TMR上电极由Ta的30-100nm厚度形成，并且在制造过程中也用作硬掩模。 在TMR元件的整个表面和TMR下电极的整个表面上形成由LT-SiN形成的层间绝缘膜，覆盖包括TMR下电极的侧表面的整个表面的层间绝缘膜和 包括LT-SiN。 形成覆盖整个表面并包含SiO 2的层间绝缘膜。
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9.发明申请公开(公告)号：US20100264501A1
公开(公告)日：2010-10-21
申请号：US12528854
申请日：2008-02-25
申请人： Haruo Furuta , Shuichi Ueno , Ryoji Matsuda , Tatsuta Fukumura , Takeharu Kuroiwa , Lien-Chang Wang , Eugene Chen , Yiming Huai
发明人： Haruo Furuta , Shuichi Ueno , Ryoji Matsuda , Tatsuta Fukumura , Takeharu Kuroiwa , Lien-Chang Wang , Eugene Chen , Yiming Huai
CPC分类号： H01L43/12 , B82Y10/00 , H01L27/228
摘要： Disclosed is a method for manufacturing a magnetic storage device comprising a TMR element, which comprises a step for forming an insulting film on an interlayer insulating film provided with a wiring layer, an opening formation step for forming an opening in the insulating film so that the wiring layer is exposed therefrom, a metal layer formation step for forming a metal layer on the insulating layer so that the opening is filled therewith, a CMP step for polishing and removing the metal layer on the insulating layer by a CMP method and forming the metal layer remaining in the opening into a lower electrode, and a step for forming a TMR element on the lower electrode. Also disclosed is a magnetic storage device comprising an interlayer insulating film provided with a wiring layer, an insulating film formed on the interlayer insulating film, an opening formed in the insulating film so that the wiring layer is exposed therefrom, a barrier metal layer provided so as to cover the inner surface of the opening, a lower electrode formed on the barrier metal so as to fill the opening, and a TMR element formed on the lower electrode.
摘要翻译： 公开了一种制造包括TMR元件的磁存储装置的方法，该方法包括在具有布线层的层间绝缘膜上形成绝缘膜的步骤，用于在绝缘膜上形成开口的开口形成步骤， 布线层暴露于其中，金属层形成步骤用于在绝缘层上形成金属层以使其开口被填充; CMP步骤，用于通过CMP方法在绝缘层上抛光和去除金属层，并形成金属 剩余在开口中的层形成下电极，以及在下电极上形成TMR元件的步骤。 还公开了一种磁存储装置，其包括设置有布线层的层间绝缘膜，形成在层间绝缘膜上的绝缘膜，形成在绝缘膜中的开口，使得布线层暴露于其中，阻挡金属层设置为 为了覆盖开口的内表面，形成在阻挡金属上以便填充开口的下电极和形成在下电极上的TMR元件。
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10.发明授权公开(公告)号：US07605420B2
公开(公告)日：2009-10-20
申请号：US11593548
申请日：2006-11-07
申请人： Haruo Furuta , Ryoji Matsuda , Shuichi Ueno , Takeharu Kuroiwa
发明人： Haruo Furuta , Ryoji Matsuda , Shuichi Ueno , Takeharu Kuroiwa
CPC分类号： H01L43/08 , B82Y10/00 , H01L27/228 , H01L43/12
摘要： The semiconductor device which has a memory cell including the TMR film with which memory accuracy does not deteriorate, and its manufacturing method are obtained. A TMR element (a TMR film, a TMR upper electrode) is selectively formed in the region which corresponds in plan view on a TMR lower electrode in a part of formation area of a digit line. A TMR upper electrode is formed by 30-100 nm thickness of Ta, and functions also as a hard mask at the time of a manufacturing process. The interlayer insulation film formed from LT-SiN on the whole surface of a TMR element and the upper surface of a TMR lower electrode is formed, and the interlayer insulation film which covers the whole surface comprising the side surface of a TMR lower electrode, and includes LT-SiN is formed. The interlayer insulation film which covers the whole surface and includes SiO2 is formed.
摘要翻译： 具有包含记忆精度不劣化的TMR膜的存储单元的半导体装置及其制造方法。 在数字线的形成区域的一部分的TMR下电极的平面图中对应的区域选择性地形成TMR元件（TMR膜，TMR上电极）。 TMR上电极由Ta的30-100nm厚度形成，并且在制造过程中也用作硬掩模。 在TMR元件的整个表面和TMR下电极的整个表面上形成由LT-SiN形成的层间绝缘膜，覆盖包括TMR下电极的侧表面的整个表面的层间绝缘膜和 包括LT-SiN。 形成覆盖整个表面并包含SiO 2的层间绝缘膜。
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