公开(公告)号：US20120068144A1

公开(公告)日：2012-03-22

申请号：US13097375

申请日：2011-04-29

申请人： Ryota FUJITSUKA ,  Masahiro KIYOTOSHI ,  Katsuyuki SEKINE ,  Mitsuru SATO

发明人： Ryota FUJITSUKA ,  Masahiro KIYOTOSHI ,  Katsuyuki SEKINE ,  Mitsuru SATO

IPC分类号： H01L45/00

CPC分类号： H01L45/146 ,  G11C11/5685 ,  G11C13/0007 ,  G11C2213/72 ,  H01L45/1233

摘要： According to one embodiment, there are provided a first electrode, a second electrode, first and second variable-resistance layers that are arranged between the first electrode and the second electrode, and at least one non variable-resistance layer that is arranged so that positions of the first and second variable-resistance layers between the first electrode and the second electrode are symmetrical to each other.

摘要翻译： 根据一个实施例，提供了布置在第一电极和第二电极之间的第一电极，第二电极，第一和第二可变电阻层，以及至少一个非可变电阻层，其被布置成使得位置 在第一电极和第二电极之间的第一和第二可变电阻层彼此对称。

公开(公告)号：US20110176351A1

公开(公告)日：2011-07-21

申请号：US12824633

申请日：2010-06-28

申请人： Ryota FUJITSUKA ,  Katsuyuki Sekine ,  Yoshio Ozawa

发明人： Ryota FUJITSUKA ,  Katsuyuki Sekine ,  Yoshio Ozawa

IPC分类号： G11C11/00 ,  H01L21/8246

CPC分类号： G11C11/5685 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2013/0083 ,  G11C2013/0092 ,  G11C2213/71 ,  H01L27/24 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1641

摘要： According to one embodiment, a nonvolatile memory device includes a memory layer and a control unit. The memory layer includes a first conductive layer, a second conductive layer and a resistance change layer. The resistance change layer is provided between the first and second conductive layers and transits between a high resistance state and a low resistance state by at least one of an applied electric field and an applied current. The control unit is electrically connected to the first and second conductive layers and configured to apply a first signal with a first polarity between the first and second conductive layers prior to applying a second signal with a second polarity different from the first polarity between the first and second conductive layers to cause the resistance change layer to transit from the high resistance state to the low resistance state.

摘要翻译： 根据一个实施例，非易失性存储器件包括存储器层和控制单元。 存储层包括第一导电层，第二导电层和电阻变化层。 电阻变化层设置在第一和第二导电层之间，并通过施加电场和施加电流中的至少一个在高电阻状态和低电阻状态之间转换。 控制单元电连接到第一和第二导电层，并且被配置为在施加具有与第一和第二导电层之间的第一极性不同的第二极性的第二信号之前，在第一和第二导电层之间施加具有第一极性的第一信号 第二导电层，以使电阻变化层从高电阻状态转移到低电阻状态。

公开(公告)号：US20080277716A1

公开(公告)日：2008-11-13

申请号：US12113367

申请日：2008-05-01

申请人： Daisuke NISHIDA ,  Akihito YAMAMOTO ,  Yoshio OZAWA ,  Katsuaki NATORI ,  Katsuyuki SEKINE ,  Masayuki TANAKA ,  Ryota FUJITSUKA

发明人： Daisuke NISHIDA ,  Akihito YAMAMOTO ,  Yoshio OZAWA ,  Katsuaki NATORI ,  Katsuyuki SEKINE ,  Masayuki TANAKA ,  Ryota FUJITSUKA

IPC分类号： H01L29/788

CPC分类号： H01L29/7883 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114 ,  H01L29/42324

摘要： A semiconductor device includes a semiconductor substrate having a device formation region, a tunnel insulating film formed on the device formation region, a floating gate electrode formed on the tunnel insulating film, isolation insulating films which cover side surfaces of the device formation region, side surfaces of the tunnel insulating film, and side surfaces of a lower portion of the floating gate electrode, an inter-electrode insulating film which covers an upper surface and side surfaces of an upper portion of the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film, wherein upper corner portions of the floating gate electrode are rounded as viewed from a direction parallel with the upper surface and the side surfaces of the upper portion of the floating gate electrode.

摘要翻译： 半导体器件包括具有器件形成区域的半导体衬底，形成在器件形成区域上的隧道绝缘膜，形成在隧道绝缘膜上的浮置栅电极，覆盖器件形成区域的侧表面的隔离绝缘膜，侧表面 的隧道绝缘膜的侧表面和浮栅的下部的侧表面，覆盖浮置栅电极的上部的上表面和侧表面的电极间绝缘膜和形成在栅极电极上的控制栅电极 所述电极间绝缘膜，其中，从与所述浮栅电极的上部的上表面和所述侧面平行的方向观察，所述浮栅电极的上角部为圆形。

公开(公告)号：US20110175048A1

公开(公告)日：2011-07-21

申请号：US13004287

申请日：2011-01-11

申请人： Katsuyuki SEKINE ,  Ryota FUJITSUKA ,  Yoshio OZAWA

发明人： Katsuyuki SEKINE ,  Ryota FUJITSUKA ,  Yoshio OZAWA

IPC分类号： H01L45/00 ,  H01L21/02

CPC分类号： H01L45/1273 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16

摘要： According to one embodiment, a nonvolatile memory device includes first and second conductive layers, a resistance change layer, and a rectifying element. The first conductive layer has first and second major surfaces. The second conductive layer has third and fourth major surfaces, a side face, and a corner part. The third major surface faces the first major surface and includes a plane parallel to the first major face and is provided between the fourth and first major surfaces. The corner part is provided between the third major surface and the side face. The corner part has a curvature higher than that of the third major surface. The resistance change layer is provided between the first and second conductive layers. The rectifying element faces the second major surface of the first conductive layer. An area of the third major surface is smaller than that the second major surface.

摘要翻译： 根据一个实施例，非易失性存储器件包括第一和第二导电层，电阻变化层和整流元件。 第一导电层具有第一和第二主表面。 第二导电层具有第三和第四主表面，侧面和拐角部分。 第三主表面面向第一主表面并且包括平行于第一主面的平面，并且设置在第四主表面和第一主表面之间。 角部设置在第三主表面和侧面之间。 角部具有高于第三主表面的曲率。 电阻变化层设置在第一和第二导电层之间。 整流元件面向第一导电层的第二主表面。 第三主表面的面积小于第二主表面的面积。

公开(公告)号：US20100006923A1

公开(公告)日：2010-01-14

申请号：US12498916

申请日：2009-07-07

申请人： Ryota FUJITSUKA ,  Katsuyuki SEKINE ,  Yoshio OZAWA ,  Daisuke NISHIDA

发明人： Ryota FUJITSUKA ,  Katsuyuki SEKINE ,  Yoshio OZAWA ,  Daisuke NISHIDA

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/792 ,  H01L29/40117 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/66833

摘要： A semiconductor device includes a tunnel insulating film formed on a surface of a semiconductor region, a charge storage insulating film formed on a surface of the tunnel insulating film, a block insulating film formed on a surface of the charge storage insulating film, and a control gate electrode formed on a surface of the block insulating film, wherein the block insulating film includes a first insulating film containing a metal element and oxygen as main components, a second insulating film containing silicon and oxygen as main components, and an interface layer formed between the first insulating film and the second insulating film and containing the metal element, silicon, and oxygen as main components.

摘要翻译： 半导体器件包括形成在半导体区域的表面上的隧道绝缘膜，形成在隧道绝缘膜的表面上的电荷存储绝缘膜，形成在电荷存储绝缘膜的表面上的块绝缘膜，以及控制 栅电极，形成在所述块绝缘膜的表面上，其中所述块绝缘膜包括含有金属元素和氧作为主要成分的第一绝缘膜，含有硅和氧作为主要成分的第二绝缘膜，以及形成在 第一绝缘膜和第二绝缘膜，并且以金属元素，硅和氧为主要成分。

公开(公告)号：US20090256192A1

公开(公告)日：2009-10-15

申请号：US12407597

申请日：2009-03-19

申请人： Ryota FUJITSUKA ,  Katsuyuki SEKINE ,  Daisuke NISHIDA ,  Katsuaki NATORI ,  Yoshio OZAWA

发明人： Ryota FUJITSUKA ,  Katsuyuki SEKINE ,  Daisuke NISHIDA ,  Katsuaki NATORI ,  Yoshio OZAWA

IPC分类号： H01L29/792 ,  H01L21/762 ,  H01L21/336

CPC分类号： H01L27/11568 ,  H01L29/40117

摘要： In a nonvolatile semiconductor memory device where a tunnel insulating film, a charge storage layer, a blocking insulating film, and a control gate are stacked one on top of another on a semiconductor substrate, with an element isolation insulating film buried between adjacent cells, a barrier layer composed of at least one of a silicon nitride film, a silicon oxynitride film, and a silicon oxide film which has a higher density than that of the element isolation insulating film is provided at the interface between the element isolation insulating film and the blocking insulating film or between the element isolation film and the control gate.

摘要翻译： 在其中隧道绝缘膜，电荷存储层，阻挡绝缘膜和控制栅极的半导体存储器件在半导体衬底上层叠在另一个的半导体衬底上，其中元件隔离绝缘膜埋在相邻电池之间， 在元件隔离绝缘膜和阻挡层之间的界面处设置有由氮化硅膜，氮氧化硅膜和具有比元件隔离绝缘膜的密度高的氧化硅膜中的至少一种构成的阻挡层 绝缘膜或元件隔离膜和控制栅之间。

公开(公告)号：US20090261400A1

公开(公告)日：2009-10-22

申请号：US12425077

申请日：2009-04-16

申请人： Yoshio OZAWA ,  Ryota FUJITSUKA

发明人： Yoshio OZAWA ,  Ryota FUJITSUKA

IPC分类号： H01L29/788 ,  H01L21/28 ,  H01L21/336

CPC分类号： H01L27/11568 ,  H01L29/513 ,  H01L29/78

摘要： A semiconductor device includes a tunnel insulating film formed on a semiconductor substrate, a charge storage insulating film formed on the tunnel insulating film and including at least two separated low oxygen concentration portions and a high oxygen concentration portion positioned between the adjacent low oxygen concentration portions and having a higher oxygen concentration than the low oxygen concentration portions, a charge block insulating film formed on the charge storage insulating film, and control gate electrodes formed on the charge block insulating film and above the low oxygen concentration portions.

摘要翻译： 半导体器件包括形成在半导体衬底上的隧道绝缘膜，形成在隧道绝缘膜上的电荷存储绝缘膜，并且包括至少两个分离的低氧浓度部分和位于相邻低氧浓度部分之间的高氧浓度部分，以及 具有比低氧浓度部分更高的氧浓度，形成在电荷存储绝缘膜上的电荷块绝缘膜，以及形成在充电块绝缘膜上和低氧浓度部分上方的控制栅电极。

公开(公告)号：US20090194808A1

公开(公告)日：2009-08-06

申请号：US12362019

申请日：2009-01-29

申请人： Ryota FUJITSUKA ,  Yoshio Ozawa ,  Katsuaki Natori

发明人： Ryota FUJITSUKA ,  Yoshio Ozawa ,  Katsuaki Natori

IPC分类号： H01L29/792

CPC分类号： H01L27/11568 ,  H01L27/112

摘要： A semiconductor device includes an element region having a channel region, and a unit gate structure inducing a channel in the channel region, the unit gate structure including a tunnel insulating film formed on the element region, a charge storage insulating film formed on the tunnel insulating film, a block insulating film formed on the charge storage insulating film, and a control gate electrode formed on the block insulating film, wherein a distance between the element region and the control gate electrode is shorter at a center portion of the unit gate structure than at both ends thereof, as viewed in a section parallel to a channel width direction.

摘要翻译： 半导体器件包括具有沟道区域的元件区域和在沟道区域中引起沟道的单元栅极结构，所述单元栅极结构包括形成在元件区域上的隧道绝缘膜，形成在隧道绝缘层上的电荷存储绝缘膜 形成在电荷存储绝缘膜上的块绝缘膜和形成在块绝缘膜上的控制栅极电极，其中元件区域和控制栅电极之间的距离在单元栅极结构的中心部分较短 在与通道宽度方向平行的部分中看到的两端。