摘要:
Method for connecting an IEEE1394 remote device to a cluster of IEEE1394 devices through a wireless link comprising a first wireless device connected to the cluster and a second wireless device connected to the remote device, wherein the remote device and the first wireless device for a first wired bus and the device cluster and the second wireless device form a second wired bus. The method comprises the steps of, representing the remote device on the cluster through the first wireless device and representing the devices of the cluster to the remote device through the second wireless device, such that the remote device and the devices of the cluster function as if these devices were part of a single IEEE1394 bus.
摘要:
Method for reserving isochronous resources in a wireless network comprising at least a wireless source device and a wireless sink device, said wireless network being based on a TDMA frame transmission scheme, said method comprising the steps of: providing an output plug in said wireless source device, said output plug being associated with an output plug register, wherein said output plug register defines a maximum amount of data output by said output plug during a wireless frame; reserving an amount of bandwidth corresponding to said maximum amount of data to be sent in a wireless frame with an isoehronous resource manager of the wireless network.
摘要:
Method for isochronous data packet transport over a wireless network, comprising the steps of: collecting a plurality of isochronous data packets at a service specific convergence sub-layer of a wireless source device; posting said plurality of isochronous data packets as a whole to a common part convergence sub-layer of the wireless source device, wherein said plurality of isochronous data packets posted to the common part convergence sub-layer corresponds to the amount of isochronous data packets generated by a transmitter over a 2 ms period.
摘要:
Advanced Video Coding uses intra prediction for 4*4 pixel blocks whereby reconstructed samples from adjacent pixel blocks are used to predict a current block. Nine different intra prediction modes are available in AVC. In order to save bits for signalling the prediction modes, a flag and a 3-bit parameter are used. If this flag is set the most probable prediction mode, which is calculated from previous predictions, is used by the encoder and the decoder to reconstruct the actual prediction mode. If the flag is cleared, the 3-bit parameter is sent to select the prediction mode independently. According to the invention, the flag is applied more frequently, based on a prediction error threshold, instead of applying the optimum prediction mode for a current pixel block.
摘要:
The invention is related to the generation of an image data stream and the reconstruction of an image from an image data stream.The method for generating an image data stream comprises the steps of (a) assigning search regions in a reference image to source macro blocks of a current image; (b) determining in the search regions best matches and corresponding residuals and (c) encoding the determined residuals in a data stream. A further feature of the method is related to the fact that the processing order in at least one of the steps (b) and (c) depends on positions of the assigned search regions in the reference image.The variation in the processing order allows for more efficient determination of best matches at encoder side and/or reduced processing requirements at decoder side.
摘要:
The invention deals with a physical layer circuit for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge. The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit. The invention solves the problem by means of configuration means in the physical layer circuit. These configuration means enable either to configure the physical layer circuit as a bridge portal physical layer circuit supporting the bridge functionality by buffering said node-ID packets in said buffer memory or else configuring the physical layer circuit as a standard physical layer circuit that disables the buffering of said node-ID packets. The new type of physical layer circuit is pin compatible with a standard physical layer circuit.
摘要:
A method for bit recovery in an asymmetric data channel, the method comprising the steps of: providing a non-linear equalization filter with two coefficient sets; using the non-linear equalization filter with a first coefficient set for compensating defects of a first type of transition between different storage states; and using the non-linear equalization filter with a second coefficient set for compensating defects of a second type of transition between different storage states.
摘要:
The invention deals with a physical layer circuit for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge. The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit. The invention solves the problem by means of configuration means in the physical layer circuit. These configuration means enable either to configure the physical layer circuit as a bridge portal physical layer circuit supporting the bridge functionality by buffering said node-ID packets in said buffer memory or else configuring the physical layer circuit as a standard physical layer circuit that disables the buffering of said node-ID packets. The new type of physical layer circuit is pin compatible with a standard physical layer circuit.
摘要:
Specialized image processing circuitry is usually implemented in hardware in a massively parallel way as a single instruction multiple data (SIMD) architecture. The invention prevents long and complicated connection paths between a processing element and the memory subsystem, and improves maximum operating frequency. An optimized architecture for image processing has processing elements that are arranged in a two-dimensional structure, and each processing element has a local storage containing a plurality of reference pixels that are not neighbors in the reference image. Instead, the reference pixels belong to different blocks of the reference image, which may vary for different encoding schemes. Each processing element has a plurality of local first registers for holding the reference image data: one of the first registers holds reference input data of a first search block, and some of the remaining first registers holding reference input data of further search blocks that have specified positions relative to the first search block.
摘要:
A bit clock recovery apparatus for digital storage readout employing sync frames, where an oversampled readout signal is stored in memory, sync patterns are located in the signal using DSP means, distances of consecutive sync pattern locations are calculated, and bit clock is recovered from these distances and the knowledge about the data framing structure.