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1.
公开(公告)号:US20200098924A1
公开(公告)日:2020-03-26
申请号:US16563699
申请日:2019-09-06
发明人: Tae Sang KIM , Joon Seok PARK , Kwang Suk KIM , Yeon Keon MOON , Geunchul PARK , Jun Hyung LIM , Kyung Jin JEON
IPC分类号: H01L29/786 , H01L27/12 , H01L21/467 , H01L29/66
摘要: A transistor substrate may include: a substrate; an active pattern formed on the substrate, the active pattern including an oxide semiconductor that contains tin (Sn), and the active pattern including a source region, a drain region, and a channel region that is formed between the source region and the drain region; a source protective pattern formed on the source region; a drain protective pattern formed on the drain region; a gate electrode overlapping at least a portion of the channel region; an insulation interlayer covering the source protective pattern and the drain protective pattern; a source electrode formed on the insulation interlayer, the source electrode being in contact with the source protective pattern through a source contact hole that is formed in the insulation interlayer; and a drain electrode formed on the insulation interlayer, the drain electrode being in contact with the drain protective pattern through a drain contact hole that is formed in the insulation interlayer.
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公开(公告)号:US20180108684A1
公开(公告)日:2018-04-19
申请号:US15702797
申请日:2017-09-13
发明人: Hyun Jin CHO , Joon-Hwa BAE , Byoung Kwon CHOO , Byung Hoon KANG , Kwang Suk KIM , Woo Jin CHO , Jun Hyuk CHEON
IPC分类号: H01L27/12 , H01L21/3105 , H01L21/66 , C09G1/02 , B24B31/00
CPC分类号: H01L27/1248 , B24B31/00 , C09G1/02 , G09G3/3233 , G09G2300/0819 , G09G2300/0847 , H01L21/02164 , H01L21/0217 , H01L21/31053 , H01L22/26 , H01L27/1244 , H01L27/1255 , H01L27/1262 , H01L27/3258 , H01L27/3262 , H01L27/3265 , H01L27/3276 , H01L29/78675 , H01L2227/323
摘要: A method for manufacturing a display device includes forming a first gate metal wire on a substrate, forming a first insulation layer that covers the first gate metal wire, forming a second gate metal wire on the first insulation layer, forming a second main insulation layer that covers the second gate metal wire, forming a second auxiliary insulation layer on the second main insulation layer, forming an exposed portion of an upper surface of the second main insulation layer by polishing the second auxiliary insulation layer, and forming a first data metal wire on the second main insulation layer and the second auxiliary insulation layer.
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公开(公告)号:US20180114819A1
公开(公告)日:2018-04-26
申请号:US15605431
申请日:2017-05-25
发明人: Byung Hoon KANG , Kwang Suk KIM , Joon-Hwa BAE , Woo Jin CHO , Hyun Jin CHO , Jun Hyuk CHEON , Byoung Kwon CHOO
IPC分类号: H01L27/32
CPC分类号: H01L27/3248 , H01L27/3276 , H01L2227/323
摘要: A method of manufacturing a display device includes: forming an active layer on a substrate; forming a first insulation layer covering the active layer; forming a gate metal line on the first insulation layer; forming a third insulation layer covering the gate metal line and including a silicon oxide; forming a fourth insulation layer including a silicon nitride on the third insulation layer; forming a fifth insulation layer including a silicon oxide on the fourth insulation layer; arranging a blocking member over a region in which the active layer and the gate metal line overlap; forming a fifth auxiliary insulation layer by doping nitrogen ions in the fifth insulation layer; and exposing a part of an upper surface of the fourth insulation layer by removing a portion of a fifth main insulation layer of the fifth insulation layer which does not overlap the fifth auxiliary insulation layer.
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4.
公开(公告)号:US20200052056A1
公开(公告)日:2020-02-13
申请号:US16539761
申请日:2019-08-13
发明人: Joon Seok PARK , Yeon Keon MOON , Kwang Suk KIM , Tae Sang KIM , Geunchul PARK , Kyung Jin JEON
摘要: An organic light emitting diode display device includes a substrate, a first oxide transistor, a second oxide transistor, and a sub-pixel structure. The substrate has a display region including a plurality of sub-pixel regions and a peripheral region located in a side of the display region. The first oxide transistor is disposed in the peripheral region on the substrate, and includes a first oxide semiconductor pattern that includes tin (Sn). The second oxide transistor is disposed in the sub-pixel regions each on the substrate, and includes a second oxide semiconductor pattern. The sub-pixel structure is disposed on the second oxide transistor.
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公开(公告)号:US20190148414A1
公开(公告)日:2019-05-16
申请号:US16243702
申请日:2019-01-09
发明人: Hyun Jin CHO , Joon-Hwa BAE , Byoung Kwon CHOO , Byung Hoon KANG , Kwang Suk KIM , Woo Jin CHO , Jun Hyuk CHEON
IPC分类号: H01L27/12 , B24B31/00 , H01L21/3105 , G09G3/3233 , C09G1/02
CPC分类号: H01L27/1248 , B24B31/00 , C09G1/02 , G09G3/3233 , G09G2300/0819 , G09G2300/0847 , H01L21/02164 , H01L21/0217 , H01L21/31053 , H01L22/26 , H01L27/1244 , H01L27/1255 , H01L27/1262 , H01L27/3258 , H01L27/3262 , H01L27/3265 , H01L27/3276 , H01L29/78675 , H01L2227/323
摘要: A method for manufacturing a display device includes forming a first gate metal wire on a substrate, forming a first insulation layer that covers the first gate metal wire, forming a second gate metal wire on the first insulation layer, forming a second main insulation layer that covers the second gate metal wire, forming a second auxiliary insulation layer on the second main insulation layer, forming an exposed portion of an upper surface of the second main insulation layer by polishing the second auxiliary insulation layer, and forming a first data metal wire on the second main insulation layer and the second auxiliary insulation layer.
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