公开(公告)号：US10522497B2

公开(公告)日：2019-12-31

申请号：US15988647

申请日：2018-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeong Ho Lee ,  Bong Ju Cho ,  Young Gwan Ko ,  Jin Su Kim ,  Shang Hoon Seo ,  Jeong Il Lee

IPC: H01L23/48 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L23/31 ,  H01L21/683

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface, and disposed in the recess portion so that the inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other, wherein the stopper layer includes an insulating material.

公开(公告)号：US10985127B2

公开(公告)日：2021-04-20

申请号：US16698516

申请日：2019-11-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeong Ho Lee ,  Bong Ju Cho ,  Young Gwan Ko ,  Jin Su Kim ,  Shang Hoon Seo ,  Jeong Il Lee

IPC: H01L23/48 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L23/31 ,  H01L21/683

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface, and disposed in the recess portion so that the inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other, wherein the stopper layer includes an insulating material.

公开(公告)号：US20200312757A1

公开(公告)日：2020-10-01

申请号：US16715697

申请日：2019-12-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Sam KANG ,  Bong Ju Cho ,  Young Gwan Ko ,  Moon Il Kim

IPC: H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor package includes a first connection member including a first redistribution layer, a first frame disposed on the first connection member, a first semiconductor chip disposed on a first through-portion and having a connection pad, a first encapsulant covering a portion of each of the first frame and the first semiconductor chip and filling at least a portion of the first through-portion, a second connection member disposed on the first encapsulant and including a second redistribution layer, a second semiconductor chip disposed on the second connection member and having a second connection pad, a second encapsulant covering a portion of the second semiconductor chip, and a first through-via penetrating through the first frame, the first encapsulant, and a portion of the first connection member, and electrically connecting the first and second redistribution layers to each other.

公开(公告)号：US10453788B2

公开(公告)日：2019-10-22

申请号：US15988893

申请日：2018-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeong II Lee ,  Jeong Ho Lee ,  Jin Su Kim ,  Bong Ju Cho

IPC: H01L23/48 ,  H01L23/498 ,  H01L23/00 ,  H01L23/495 ,  H01L23/31

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers disposed on the insulating layers, and connection via layers penetrating through the insulating layers and electrically connecting the wiring layers to each other, and having a recess portion; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and an active surface of the semiconductor chip and including one or more redistribution layers electrically connecting the wiring layers and the connection pads to each other, in which the recess portion includes walls having different inclined angles.

公开(公告)号：US11894310B2

公开(公告)日：2024-02-06

申请号：US17194438

申请日：2021-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Sam Kang ,  Ki Ju Lee ,  Young Chan Ko ,  Jeong Seok Kim ,  Bong Ju Cho

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/552 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/367

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L2221/68372 ,  H01L2224/214 ,  H01L2924/3025

Abstract: A fan-out semiconductor package including a first redistribution layer; a first semiconductor chip on the first redistribution layer; an interconnector on the first redistribution layer and spaced apart from the first semiconductor chip; a molded layer covering the interconnector and side surfaces of the first semiconductor chip; and a second redistribution layer on the molded layer, wherein the interconnector includes a metal ball and is electrically connected to the first redistribution layer, the second redistribution layer includes a first line wiring, and a first via electrically connected to the first line wiring, the first via is connected to the interconnector, and a part of the first via is in the molded layer.

公开(公告)号：US11075152B2

公开(公告)日：2021-07-27

申请号：US16715697

申请日：2019-12-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Sam Kang ,  Bong Ju Cho ,  Young Gwan Ko ,  Moon Il Kim

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package includes a first connection member including a first redistribution layer, a first frame disposed on the first connection member, a first semiconductor chip disposed on a first through-portion and having a connection pad, a first encapsulant covering a portion of each of the first frame and the first semiconductor chip and filling at least a portion of the first through-portion, a second connection member disposed on the first encapsulant and including a second redistribution layer, a second semiconductor chip disposed on the second connection member and having a second connection pad, a second encapsulant covering a portion of the second semiconductor chip, and a first through-via penetrating through the first frame, the first encapsulant, and a portion of the first connection member, and electrically connecting the first and second redistribution layers to each other.

公开(公告)号：US11842956B2

公开(公告)日：2023-12-12

申请号：US17355790

申请日：2021-06-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Sam Kang ,  Bong Ju Cho ,  Young Gwan Ko ,  Moon Il Kim

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/49827 ,  H01L23/3128 ,  H01L23/49861 ,  H01L24/13 ,  H01L25/0657

Abstract: A method includes forming a first package structure including a first connection member including a first redistribution layer, a first frame having a first through-portion, a first semiconductor chip having a connection pad electrically connected to the first redistribution layer, and a first encapsulant covering a portion of each of the first frame and the first semiconductor chip, forming a second package structure including a second connection member including a second redistribution layer, a second semiconductor chip having a second connection pad, and a second encapsulant covering a portion of the second semiconductor chip, forming a first through-via, the first through-via electrically connecting to the second redistribution layer, and laminating the first package structure on the second package structure. After the laminating, the first through-via penetrates through the first frame, the first encapsulant, and a portion of the first connection member, and is electrically connected to the first redistribution layer.