公开(公告)号：US20170103958A1

公开(公告)日：2017-04-13

申请号：US15213505

申请日：2016-07-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHANHO LEE ,  MYEONG SOON PARK ,  HYUNSOO CHUNG

IPC: H01L23/00

CPC classification number: H01L24/17 ,  H01L23/562 ,  H01L24/06 ,  H01L24/14 ,  H01L2224/0401 ,  H01L2224/0903 ,  H01L2224/09154 ,  H01L2224/1403 ,  H01L2224/1703 ,  H01L2224/17055 ,  H01L2224/1712 ,  H01L2924/15311 ,  H01L2924/3511

Abstract: A semiconductor package includes a semiconductor chip mounted on a substrate that has a top surface and a bottom surface opposite to each other, and connection members that connect the substrate and the semiconductor chip to each other. The connection members include first connection members disposed on a central region of the semiconductor chip and that have heights equal to each other, and second connection members disposed on an edge region of the semiconductor chip and that have heights equal to each other. The heights of the first connection members differ from the heights of the second connection members.

公开(公告)号：US20240071479A1

公开(公告)日：2024-02-29

申请号：US18347852

申请日：2023-07-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYUWON CHOI ,  CHANHO LEE ,  HYEONGCHEOL KIM

IPC: G11C11/4099 ,  G11C11/4091 ,  G11C11/4094

CPC classification number: G11C11/4099 ,  G11C11/4091 ,  G11C11/4094

Abstract: A static random access memory includes a memory cell that stores data, a reference voltage generator that generates a reference voltage, a precharge circuit that is connected with the memory cell through a bit line, is connected with the reference voltage generator through a reference bit line, and pre-charges the bit line and the reference bit line, and a sense amplifier that is connected with the bit line and the reference bit line, compares a voltage of the bit line and a voltage of the reference bit line to generate a comparison result, and determines a value of the data stored in the memory cell based on the comparison result. The reference voltage generator includes first-type transistors.

公开(公告)号：US20210305114A1

公开(公告)日：2021-09-30

申请号：US17087879

申请日：2020-11-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： CHANHO LEE ,  WON KIM ,  HAESEOK PARK ,  ILGEUN JUNG ,  JINKUK BAE ,  INYOUNG LEE ,  SUNGDONG CHO

IPC: H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

Abstract: A semiconductor package may include a base, a first chip on the base, and first connection patterns that connect and couple the base and the first chip. The first chip may include a substrate, pad patterns on the substrate, a passivation layer on the substrate and having openings, and pillars on the substrate, the pad patterns include a first signal pad and a second signal pad, the first connection patterns are in contact with the pillars, the pillars include a first signal pillar in contact with the first signal pad and a second signal pillar in contact with the second signal pad, the openings in the passivation layer include a first opening having a sidewall facing a side surface of the first signal pillar and surrounding the side surface of the first signal pillar, and a second opening having a sidewall facing a side surface of the second signal pillar and surrounding the side surface of the second signal pillar, and a maximum width of the second opening is greater than a maximum width of the first opening.