公开(公告)号：US20240136341A1

公开(公告)日：2024-04-25

申请号：US18356682

申请日：2023-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seokgeun AHN ,  Daewoo KIM ,  Seokhyun LEE

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/538 ,  H01L25/00

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/5383 ,  H01L24/08 ,  H01L25/50 ,  H01L2224/08225

Abstract: A semiconductor package, comprising: a first redistribution wiring layer including first and second surfaces opposite to each other, wherein the first redistribution wiring layer includes a first chip mounting region and a second chip mounting region adjacent to the first chip mounting region; a connection layer on the first surface of the first redistribution wiring layer; a first semiconductor chip on the first chip mounting region on the connection layer; a second semiconductor chip spaced apart from the first semiconductor chip on the second chip mounting region on the connection layer, wherein the second semiconductor chip includes through electrodes; a molding member on the first and second semiconductor chips on the connection layer; and a second redistribution wiring layer on the molding member, wherein the second redistribution wiring layer is electrically connected to the first redistribution wiring layer through the through electrodes.