公开(公告)号：US20240170440A1

公开(公告)日：2024-05-23

申请号：US18373405

申请日：2023-09-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hwanyoung CHOI ,  Seokhyun LEE ,  Seokgeun AHN

IPC: H01L23/00 ,  H01L25/065

CPC classification number: H01L24/33 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/32059 ,  H01L2224/32145 ,  H01L2224/3303 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/2064

Abstract: A semiconductor package includes first semiconductor chips electrically connected to each other through a through-via electrically connecting a first front surface pad and a first rear surface pad. A second semiconductor chip has a second lower surface including a second front surface pad, a second upper surface, a second side surface extending from the second upper surface, and a recess surface extending from the second lower surface to the second side surface. First adhesive films are on a first lower surface of first semiconductor chips and include first extension portions extending further outwardly than a first side surface of the first semiconductor chips. A second adhesive film is on the second lower surface and includes a second extension portion extending further outwardly than the second side surface. In a horizontal direction, a length of the second extension portion is less than a length of each of the first extension portions.

公开(公告)号：US20240136341A1

公开(公告)日：2024-04-25

申请号：US18356682

申请日：2023-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seokgeun AHN ,  Daewoo KIM ,  Seokhyun LEE

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/538 ,  H01L25/00

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/5383 ,  H01L24/08 ,  H01L25/50 ,  H01L2224/08225

Abstract: A semiconductor package, comprising: a first redistribution wiring layer including first and second surfaces opposite to each other, wherein the first redistribution wiring layer includes a first chip mounting region and a second chip mounting region adjacent to the first chip mounting region; a connection layer on the first surface of the first redistribution wiring layer; a first semiconductor chip on the first chip mounting region on the connection layer; a second semiconductor chip spaced apart from the first semiconductor chip on the second chip mounting region on the connection layer, wherein the second semiconductor chip includes through electrodes; a molding member on the first and second semiconductor chips on the connection layer; and a second redistribution wiring layer on the molding member, wherein the second redistribution wiring layer is electrically connected to the first redistribution wiring layer through the through electrodes.

公开(公告)号：US20240234369A1

公开(公告)日：2024-07-11

申请号：US18617113

申请日：2024-03-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seokgeun AHN

IPC: H01L25/065 ,  H01L23/13 ,  H01L25/18

CPC classification number: H01L25/0652 ,  H01L23/13 ,  H01L25/18 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06586

Abstract: A semiconductor package is provided. The semiconductor package includes: a package substrate having a first surface, a second surface that is provided opposite the first surface and has a concave portion, and a through-hole having a side surface that is oblique with respect to the first surface, and a first diameter of a first opening of the through-hole defined through the first surface being less than a second diameter of a second opening of the through-hole defined through a bottom surface of the concave portion; a plurality of first semiconductor chips provided on the first surface; a second semiconductor chip provided on the bottom surface; and a molding portion provided in the through-hole, and covering the plurality of first semiconductor chips and the second semiconductor chip.

公开(公告)号：US20220392870A1

公开(公告)日：2022-12-08

申请号：US17890835

申请日：2022-08-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seokgeun AHN

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/13

Abstract: A semiconductor package is provided. The semiconductor package includes: a package substrate having a first surface, a second surface that is provided opposite the first surface and has a concave portion, and a through-hole having a side surface that is oblique with respect to the first surface, and a first diameter of a first opening of the through-hole defined through the first surface being less than a second diameter of a second opening of the through-hole defined through a bottom surface of the concave portion; a plurality of first semiconductor chips provided on the first surface; a second semiconductor chip provided on the bottom surface; and a molding portion provided in the through-hole, and covering the plurality of first semiconductor chips and the second semiconductor chip.