公开(公告)号：US20220359379A1

公开(公告)日：2022-11-10

申请号：US17866782

申请日：2022-07-18

申请人： Samsung Electronics Co., Ltd.

发明人： Suhyun Bark ,  Kyeongbeom Park ,  Jongmin Baek ,  Jangho Lee ,  Wookyung You ,  Deokyoung Jung

IPC分类号： H01L23/522 ,  H01L23/528 ,  H01L27/088

摘要： A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.

公开(公告)号：US20240339377A1

公开(公告)日：2024-10-10

申请号：US18463550

申请日：2023-09-08

申请人： Samsung Electronics Co., Ltd.

发明人： Junghwan Chun ,  Minjae Kang ,  Koungmin Ryu ,  Jongmin Baek ,  Deokyoung Jung

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L23/522

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L23/5226 ,  H01L23/53295

摘要： A semiconductor device includes an active region extending on a substrate in a first direction; a device isolation layer on the active region; a source/drain region on the active region; an interlayer insulating layer on the source/drain region; a stopper layer on the interlayer insulating layer; a contact structure passing through the interlayer insulating layer and the stopper layer and electrically connected to the source/drain region; and a conductive through-structure passing through the device isolation layer and the interlayer insulating layer from a lower surface of the substrate, and extending in a third direction, to contact a lower surface of the contact structure and the stopper layer, wherein the stopper layer is in contact with a portion of a side surface of the contact structure, and a lower surface of the stopper layer is lower than an upper surface of the contact structure relative to the substrate.

公开(公告)号：US11424182B2

公开(公告)日：2022-08-23

申请号：US17130293

申请日：2020-12-22

申请人： Samsung Electronics Co., Ltd.

发明人： Suhyun Bark ,  Kyeongbeom Park ,  Jongmin Baek ,  Jangho Lee ,  Wookyung You ,  Deokyoung Jung

IPC分类号： H01L21/00 ,  H01L23/522 ,  H01L23/528 ,  H01L27/088

摘要： A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.

公开(公告)号：US20220238433A1

公开(公告)日：2022-07-28

申请号：US17453197

申请日：2021-11-02

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Junghoo Shin ,  Sanghoon Ahn ,  Seung Jae Lee ,  Deokyoung Jung ,  Woojin Lee

IPC分类号： H01L23/522 ,  H01L23/528 ,  H01L23/532

摘要： A semiconductor device includes a second insulating layer disposed on a substrate and that includes a first trench that extends in a first direction, a first via disposed in the first hole, a first interconnection layer disposed in the first trench on the first via and that has an upwardly upper region, and a third insulating layer disposed on the second insulating layer and that includes a second hole and a second trench connected to the second hole. The first trench has inclined side surfaces such that a width of the first trench increases in a direction toward the substrate, the second hole has inclined side surfaces such that a width of the second hole decreases in the direction toward the substrate, and a lower portion of the second hole is wider than an upper surface of the first interconnection layer.

公开(公告)号：US20240030127A1

公开(公告)日：2024-01-25

申请号：US18446524

申请日：2023-08-09

申请人： Samsung Electronics Co., Ltd.

发明人： Suhyun Bark ,  Kyeongbeom Park ,  Jongmin Baek ,  Jangho Lee ,  Wookyung You ,  Deokyoung Jung

IPC分类号： H01L23/522 ,  H01L23/528 ,  H01L27/088

CPC分类号： H01L23/5226 ,  H01L23/528 ,  H01L27/088

摘要： A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.

公开(公告)号：US11646263B2

公开(公告)日：2023-05-09

申请号：US17155126

申请日：2021-01-22

申请人： Samsung Electronics Co., Ltd.

发明人： Wookyung You ,  Kyeongbeom Park ,  Sungbin Park ,  Suhyun Park ,  Jongmin Baek ,  Jangho Lee ,  Seonghun Lim ,  Deokyoung Jung ,  Kyuhee Han

IPC分类号： H01L21/00 ,  H01L23/522 ,  H01L23/528

CPC分类号： H01L23/5226 ,  H01L23/528 ,  H01L23/5228

摘要： A semiconductor device includes a first insulating layer disposed on a substrate, a first wiring disposed in the first insulating layer, a first insulating barrier layer disposed on the first insulating layer, an etch-stop layer disposed on the first insulating barrier layer and having an area smaller than an area of the first insulating barrier layer in a plan view, a resistive metal pattern disposed on the etch-stop layer, a second insulating barrier layer disposed on the resistive metal pattern, a second insulating layer covering the first and second insulating barrier layers, a second wiring disposed in the second insulating layer, and a first conductive via disposed between the resistive metal pattern and the second wiring to penetrate through the second insulating barrier layer and the second insulating layer and electrically connect the resistive metal pattern and the second wiring.

公开(公告)号：US20210351123A1

公开(公告)日：2021-11-11

申请号：US17130293

申请日：2020-12-22

申请人： Samsung Electronics Co., Ltd.

发明人： Suhyun Bark ,  Kyeongbeom Park ,  Jongmin Baek ,  Jangho Lee ,  Wookyung You ,  Deokyoung Jung

IPC分类号： H01L23/522 ,  H01L27/088 ,  H01L23/528

摘要： A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.

公开(公告)号：US12014980B2

公开(公告)日：2024-06-18

申请号：US18446524

申请日：2023-08-09

申请人： Samsung Electronics Co., Ltd.

发明人： Suhyun Bark ,  Kyeongbeom Park ,  Jongmin Baek ,  Jangho Lee ,  Wookyung You ,  Deokyoung Jung

IPC分类号： H01L21/00 ,  H01L23/522 ,  H01L23/528 ,  H01L27/088

CPC分类号： H01L23/5226 ,  H01L23/528 ,  H01L27/088

摘要： A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.

公开(公告)号：US20210391254A1

公开(公告)日：2021-12-16

申请号：US17155126

申请日：2021-01-22

申请人： Samsung Electronics Co., Ltd.

发明人： Wookyung You ,  Kyeongbeom Park ,  Sungbin Park ,  Suhyun Park ,  Jongmin Baek ,  Jangho Lee ,  Seonghun Lim ,  Deokyoung Jung ,  Kyuhee Han

IPC分类号： H01L23/522 ,  H01L23/528

摘要： A semiconductor device includes a first insulating layer disposed on a substrate, a first wiring disposed in the first insulating layer, a first insulating barrier layer disposed on the first insulating layer, an etch-stop layer disposed on the first insulating barrier layer and having an area smaller than an area of the first insulating barrier layer in a plan view, a resistive metal pattern disposed on the etch-stop layer, a second insulating barrier layer disposed on the resistive metal pattern, a second insulating layer covering the first and second insulating barrier layers, a second wiring disposed in the second insulating layer, and a first conductive via disposed between the resistive metal pattern and the second wiring to penetrate through the second insulating barrier layer and the second insulating layer and electrically connect the resistive metal pattern and the second wiring.

公开(公告)号：US10103098B2

公开(公告)日：2018-10-16

申请号：US15403480

申请日：2017-01-11

申请人： Samsung Electronics Co., Ltd.

发明人： Deokyoung Jung ,  Kwangjin Moon ,  Byung Lyul Park ,  Jin Ho An

IPC分类号： H01L23/00 ,  H01L23/522 ,  H01L23/532 ,  H01L23/48

摘要： Semiconductor devices including a through via structure and methods of forming the same are provided. The semiconductor devices may include a semiconductor substrate including a first surface and a second surface opposite the first surface, a front insulating layer on the first surface of the semiconductor substrate, a back insulating layer on the second surface of the semiconductor substrate, a through via structure extending through the back insulating layer, the semiconductor substrate, and the front insulating layer, a via insulating layer on a side surface of the through via structure, and a contact structure extending through the front insulating layer. The through via structure may include a first region and a second region disposed on the first region. The second region may include a first doping element, and the first region may be substantially free of the first doping element.