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公开(公告)号:US20240276719A1
公开(公告)日:2024-08-15
申请号:US18379849
申请日:2023-10-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Heesuk KIM , Seungyoon KIM , Yejin PARK , Inhwan BAEK , Jongseon AHN
Abstract: A semiconductor device includes: a lower circuit pattern disposed on a substrate; a common source plate (CSP) disposed on the lower circuit pattern; a channel connection pattern disposed on the CSP; a sacrificial layer structure disposed on the CSP and spaced apart from the channel connection pattern; a support layer disposed on the channel connection pattern and the sacrificial layer structure; first and second gate electrode structures including gate electrodes stacked on the support layer and spaced apart from each other; a first channel disposed on the CSP, wherein the first channel extends through the first gate electrode structure, the support layer and the channel connection pattern; and a contact plug extending through the second gate electrode structure, the support layer, the sacrificial layer structure and the CSP, wherein the contact plug is electrically connected to the lower circuit pattern.
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公开(公告)号:US20230201992A1
公开(公告)日:2023-06-29
申请号:US18086871
申请日:2022-12-22
Applicant: DONGJIN SEMICHEM CO., LTD. , SAMSUNG ELECTRONICS CO., LTD.
Inventor: Heesuk KIM , Goo Hwa LEE , Jaehong YOO , Jong Dai PARK , Jae Hyun KIM , Juyoung YUN , Jisung LEE , Seonung CHOI , Jae-hwi LEE , Bong Soo AHN , Sam-jong CHOI
IPC: B24B37/04
CPC classification number: B24B37/042
Abstract: A method of polishing a substrate having amorphous carbon layer deposited thereon removes protrusions on the ACL surface by using a soft pad with a low hardness and a polishing slurry containing non-spherical modified fumed silica with high friction force with the surface.
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公开(公告)号:US20240130123A1
公开(公告)日:2024-04-18
申请号:US18208459
申请日:2023-06-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yejin PARK , Seung Yoon KIM , Heesuk KIM , Hyeongjin KIM , Sehee JANG , Minsoo SHIN , Seungjun SHIN , Sanghun CHUN , Jeehoon HAN , Jae-Hwang SIM , Jongseon AHN
IPC: H10B43/27 , H01L23/522 , H01L23/528 , H01L25/065 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/35 , H10B80/00
CPC classification number: H10B43/27 , H01L23/5226 , H01L23/5283 , H01L25/0652 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/35 , H10B80/00 , H01L2225/06541
Abstract: Disclosed are semiconductor devices, electronic systems including the same, and methods of fabricating the same. The semiconductor device comprises a first gate stack structure including a first dielectric pattern and a first conductive pattern that are alternately stacked with each other, a memory channel structure including a first memory portion that penetrates the first gate stack structure, a through contact including a first through portion at a level the same as a level of the first memory portion, and a connection contact including a first connection portion at a level the same as the level of the first memory portion and the level of the first through portion. A minimum width of the first memory portion is less than a minimum width of the first through portion and a minimum width of the first connection portion.
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