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公开(公告)号：US20250140309A1
公开(公告)日：2025-05-01
申请号：US18653285
申请日：2024-05-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyeongjin Yoo , Wangsoo KIM , Junsub Yoon
IPC: G11C11/4099 , G11C5/10 , G11C11/4093
Abstract: A memory device includes a reference voltage generator configured to generate a reference voltage, and a data input/output (I/O) buffer configured to receive a data signal having a first phase, generate a phase control signal having a second phase opposite to the first phase, and generate an output signal based on the data signal, the phase control signal, and the reference voltage.
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