公开(公告)号：US20230131945A1

公开(公告)日：2023-04-27

申请号：US18089148

申请日：2022-12-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heon Su JEONG ,  Hangi JUNG ,  Wangsoo KIM ,  Hae Young CHUNG

IPC: G06F13/16 ,  G06F13/40 ,  G11C7/22 ,  G11C7/10 ,  G11C8/18

Abstract: A memory device of a memory module includes a CA buffer that receives a command/address (CA) signal through a bus shared by a memory device different from the memory device of the memory module, and a calibration logic circuit that identifies location information of the memory device on the bus. The memory device recognizes its own location on a bus in a memory module to perform self-calibration, and thus, the memory device appropriately operates even under an operation condition varying depending on a location in the memory module.

公开(公告)号：US20250140309A1

公开(公告)日：2025-05-01

申请号：US18653285

申请日：2024-05-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyeongjin Yoo ,  Wangsoo KIM ,  Junsub Yoon

IPC: G11C11/4099 ,  G11C5/10 ,  G11C11/4093

Abstract: A memory device includes a reference voltage generator configured to generate a reference voltage, and a data input/output (I/O) buffer configured to receive a data signal having a first phase, generate a phase control signal having a second phase opposite to the first phase, and generate an output signal based on the data signal, the phase control signal, and the reference voltage.