Electronic device for processing audio data and method for operating same

    公开(公告)号:US12198732B2

    公开(公告)日:2025-01-14

    申请号:US17310460

    申请日:2021-07-29

    Abstract: An electronic device according to various embodiments includes a camera; a display; a communication module supporting Bluetooth communication; and a processor configured to: establish a communication link with a plurality of external electronic devices through the communication module; transmit a first signal indicating an occurrence of an event using the camera to at least one of the plurality of external electronic devices through the communication link; receive audio data corresponding to sound acquired by each of the plurality of external electronic devices, from each of the plurality of external electronic devices in predetermined time periods through the communication link in a state in which the plurality of external electronic devices are worn; and synchronize the audio data with video acquired using the camera and store the synchronized data, based on time and an order at which each of the plurality of external electronic devices acquires the sound.

    Three-dimensional semiconductor memory devices

    公开(公告)号:US11659712B2

    公开(公告)日:2023-05-23

    申请号:US17712225

    申请日:2022-04-04

    CPC classification number: H01L27/11582 H01L27/1157 H01L27/11565

    Abstract: Disclosed are three-dimensional semiconductor memory devices including an electrode structure including gate electrodes stacked in a first direction, a lower pattern group including lower vertical patterns that are in a lower portion of the electrode structure and are connected to the substrate, and an upper pattern group including upper vertical patterns that are in an upper portion of the electrode structure. The upper vertical patterns may be connected to the lower vertical patterns, respectively. The devices may also include two common source plugs spaced apart from each other in a second direction. The electrode structure may be between the two common source plugs. An upper portion of the lower pattern group has a first width in the second direction, an upper portion of the upper pattern group has a second width in the second direction, and the first width may be greater than the second width.

    Method for processing audio data and electronic device therefor

    公开(公告)号:US11341981B2

    公开(公告)日:2022-05-24

    申请号:US16793370

    申请日:2020-02-18

    Abstract: Disclosed is an electronic device including a speaker, a communication circuit, a processor, and a memory. The processor is configured to receive first data including a first audio frame corresponding to a first interval and a second audio frame corresponding to a second interval subsequent to the first interval, using the communication circuit, to store the second audio frame in the memory in response to reception of the first data, to output a first audio signal generated based on the first audio frame, through the speaker, and to store the third audio frame in the memory and output a second audio signal generated based on the second audio frame of the second data through the speaker when second data including the second audio frame and a third audio frame corresponding to a third interval subsequent to the second interval is received using the communication circuit.

    Three-dimensional semiconductor memory devices

    公开(公告)号:US10553610B2

    公开(公告)日:2020-02-04

    申请号:US16149848

    申请日:2018-10-02

    Abstract: Disclosed are three-dimensional semiconductor memory devices including an electrode structure including gate electrodes stacked in a first direction, a lower pattern group including lower vertical patterns that are in a lower portion of the electrode structure and are connected to the substrate, and an upper pattern group including upper vertical patterns that are in an upper portion of the electrode structure. The upper vertical patterns may be connected to the lower vertical patterns, respectively. The devices may also include two common source plugs spaced apart from each other in a second direction. The electrode structure may be between the two common source plugs. An upper portion of the lower pattern group has a first width in the second direction, an upper portion of the upper pattern group has a second width in the second direction, and the first width may be greater than the second width.

    Audio output device and method for controlling output speed of audio data thereof

    公开(公告)号:US11487497B2

    公开(公告)日:2022-11-01

    申请号:US17148694

    申请日:2021-01-14

    Abstract: An audio output device according to an embodiment may include: a short-range communication module configured to perform short-range wireless communication; a memory configured to buffer audio data received from an external electronic device through the short-range communication module; an audio output unit configured to output the audio data; and a processor. The processor may be configured to: receive operation mode information related to a function being executed in the external electronic device from the external electronic device through the short-range communication module; configure a reference period corresponding to an amount of the audio data buffered in the memory based on the operation mode information; and determine a playback speed of the audio data to be output through the audio output unit by comparing the amount of the buffered audio data with the configured reference period. In addition, various other embodiments may be possible.

    Electronic device for transmitting packets via wireless communication connection and method of operating the same

    公开(公告)号:US11923981B2

    公开(公告)日:2024-03-05

    申请号:US17497308

    申请日:2021-10-08

    CPC classification number: H04L1/08 H04W76/10

    Abstract: According to various embodiments, an electronic device may include: a transceiver; and at least one processor, wherein the at least one processor is configured to: control the electronic device to establish a wireless communication connection between the electronic device and an external electronic device, generate, by encoding a first frame included in an audio stream, multiple pieces of compressed data corresponding to the first frame, transmit a first packet, including main compressed data corresponding to the first frame from among the multiple pieces of compressed data, to the external electronic device via the transceiver based on the wireless communication connection, and based on a first signal being received from the external electronic device via the transceiver based on the wireless communication connection within a specified time after transmission of the first packet, transmit a second packet, including first sub-compressed data corresponding to the first frame from among the multiple pieces of compressed data, to the external electronic device via the transceiver based on the wireless communication connection.

    Three-dimensional semiconductor memory devices

    公开(公告)号:US11302709B2

    公开(公告)日:2022-04-12

    申请号:US16732518

    申请日:2020-01-02

    Abstract: Disclosed are three-dimensional semiconductor memory devices including an electrode structure including gate electrodes stacked in a first direction, a lower pattern group including lower vertical patterns that are in a lower portion of the electrode structure and are connected to the substrate, and an upper pattern group including upper vertical patterns that are in an upper portion of the electrode structure. The upper vertical patterns may be connected to the lower vertical patterns, respectively. The devices may also include two common source plugs spaced apart from each other in a second direction. The electrode structure may be between the two common source plugs. An upper portion of the lower pattern group has a first width in the second direction, an upper portion of the upper pattern group has a second width in the second direction, and the first width may be greater than the second width.

    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES

    公开(公告)号:US20190304993A1

    公开(公告)日:2019-10-03

    申请号:US16149848

    申请日:2018-10-02

    Abstract: Disclosed are three-dimensional semiconductor memory devices including an electrode structure including gate electrodes stacked in a first direction, a lower pattern group including lower vertical patterns that are in a lower portion of the electrode structure and are connected to the substrate, and an upper pattern group including upper vertical patterns that are in an upper portion of the electrode structure. The upper vertical patterns may be connected to the lower vertical patterns, respectively. The devices may also include two common source plugs spaced apart from each other in a second direction. The electrode structure may be between the two common source plugs. An upper portion of the lower pattern group has a first width in the second direction, an upper portion of the upper pattern group has a second width in the second direction, and the first width may be greater than the second width.

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