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公开(公告)号:US11961551B2
公开(公告)日:2024-04-16
申请号:US17585865
申请日:2022-01-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Soo Bong Chang , Young-Il Lim , Bok-Yeon Won , Seok Jae Lee , Dong Geon Kim , Myeong Sik Ryu , In Seok Baek , Kyoung Min Kim , Sang Wook Park
IPC: G11C11/4091 , G11C11/4094
CPC classification number: G11C11/4091 , G11C11/4094
Abstract: A bitline sense amplifier including: an amplifier which is connected between a first sensing bitline and a second sensing bitline, and detects and amplifies a voltage difference between a first bitline and a second bitline in response to a first control signal and a second control signal; and an equalizer which is connected between a first supply line through which the first control signal is supplied and a second supply line through which the second control signal is supplied, and pre-charges the first bitline and the second bitline with a precharge voltage in response to an equalizing control signal, wherein the equalizer includes an equalizing enable transistor in which a source terminal is connected to the first supply line and performs equalizing in response to the equalizing control signal.
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公开(公告)号:US11776588B2
公开(公告)日:2023-10-03
申请号:US17465429
申请日:2021-09-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seok Jae Lee , Bok-Yeon Won , Kyoung Min Kim , Dong Geon Kim , Myeong Sik Ryu , In Seok Baek
IPC: G11C7/06 , G11C5/06 , G11C7/10 , G11C8/10 , G11C11/4093
CPC classification number: G11C7/062 , G11C5/06 , G11C7/10 , G11C8/10 , G11C11/4093
Abstract: A sense amplifier includes a bit line sense amplifier including a first transistor and a second transistor spaced apart from each other in a first direction, a second conductive line configured to electrically connect the first transistor to the second transistor and extending in the first direction and a local sense amplifier configured to at least partially overlap the second conductive line and disposed between the first transistor and the second transistor. The local sense amplifier includes an active region, a plurality of gate patterns at least partially extending in the first direction and disposed on the active region, a first contact disposed between the plurality of gate patterns and including a long side extending in the first direction and a short side extending in a second direction crossing the first direction and a first conductive line electrically connected to the first contact while overlapping the first contact in a plan view and including a first conductive region extending in the first direction.
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