QUANTUM COMPUTING DEVICE AND SYSTEM

    公开(公告)号:US20210328127A1

    公开(公告)日:2021-10-21

    申请号:US17227661

    申请日:2021-04-12

    Abstract: Provided is a quantum computing device and system. The quantum computing device includes a first qubit chip, a readout cavity structure surrounding a first end part of the first qubit chip, and a storage cavity structure surrounding a second end part of the first qubit chip, wherein the first qubit chip includes a first readout antenna disposed within the readout cavity structure, a first storage antenna disposed in the storage cavity structure, and a first qubit element provided between the first readout antenna and the first storage antenna, and wherein the first qubit element is disposed between the readout cavity structure and the storage cavity structure.

    THREE-DIMENSIONAL TRANSMON QUBIT APPARATUS

    公开(公告)号:US20210216899A1

    公开(公告)日:2021-07-15

    申请号:US16916832

    申请日:2020-06-30

    Abstract: Provided is a three-dimensional (3D) transmon qubit apparatus including a body portion, a driver, a transmon element disposed in an internal space of the body portion, a first tunable cavity module disposed in the internal space of the body, and comprising a first superconductive metal panel; and a second tunable cavity module disposed in the internal space of the body, and comprising a second superconductive metal panel, wherein the transmon element is disposed between the first superconductive metal panel and the second superconductive metal panel; wherein the first tunable cavity module and the second tunable cavity module are configured to adjust a distance between the first superconductive metal panel and the second superconductive metal panel, and wherein the driver is configured to tune a resonance frequency by adjusting a 3D cavity by adjusting the distance between the first superconductive metal panel and the second superconductive metal panel.

    METHOD AND DEVICE WITH JOSEPHSON JUNCTION
    4.
    发明公开

    公开(公告)号:US20240260483A1

    公开(公告)日:2024-08-01

    申请号:US18507672

    申请日:2023-11-13

    CPC classification number: H10N60/124 H10N60/0941 H10N60/805

    Abstract: A device including a Josephson junction device including a first superconductor layer, a first oxide layer disposed on a first upper surface of the first superconductor layer, a second superconductor layer disposed to partially overlap the first superconductor layer, a second oxide layer disposed on a second upper surface of the second superconductor layer, and a third superconductor layer including a first portion facing the first upper surface of the first superconductor layer and a second portion facing the second upper surface of the second superconductor layer, and a first thickness of a first portion of the first oxide layer between a lower surface of the first portion of the third superconductor layer and a third upper surface of the first superconductor layer is less than a second thickness of a second portion of the first oxide layer.

    QUBIT CHIP DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20240260487A1

    公开(公告)日:2024-08-01

    申请号:US18488645

    申请日:2023-10-17

    CPC classification number: H10N69/00

    Abstract: A qubit chip device includes: a substrate; a superconducting qubit on the substrate; and a readout circuit on the substrate and electrically connected to the superconducting qubit, the readout circuit including: a signal line on a surface of the substrate; a ground plate on the surface of the substrate, the ground plate including a pattern forming a coplanar waveguide along the signal line and offset from the signal line; and a conductive bridge embedded in the substrate and connecting two portions of the ground plate in a direction crossing the signal line.

    JOSEPHSON JUNCTION DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20210217946A1

    公开(公告)日:2021-07-15

    申请号:US17015512

    申请日:2020-09-09

    Abstract: A Josephson junction device includes a planar arrangement including a first two-dimensional (2D) material layer, a graphene layer, and a second 2D material layer planarly arranged on a device substrate, the first 2D material layer including at least one layer of a 2D material, the graphene layer forming a first junction with the first 2D material layer, and the second 2D material layer forming a second junction with the graphene layer and including at least one layer of a 2D material. A distance between the first junction and the second junction is within a range configured to cause a Josephson effect.

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