公开(公告)号：US20240162213A1

公开(公告)日：2024-05-16

申请号：US18376467

申请日：2023-10-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yechung CHUNG ,  Woonbae KIM ,  Jeongkyu HA

IPC: H01L25/18 ,  H01L23/552 ,  H10K59/90

CPC classification number: H01L25/18 ,  H01L23/552 ,  H10K59/90 ,  H01L23/5387

Abstract: A display apparatus includes a silicon substrate including a first surface and a second surface opposite thereto and including an opaque material, a display panel disposed on the first surface of the silicon substrate, a base film including a third surface and a fourth surface opposite thereto, the fourth surface having a portion facing the first surface of the silicon substrate, a display driving chip mounted on the base film, a connector disposed on a portion of the third surface of the base film, and a driving printed circuit board (PCB) electrically connected with the base film, wherein the silicon substrate corresponds to the base film in a one-to-one relationship, and a length of an edge of the base film overlapping the silicon substrate is about 90% of a length of an edge of the silicon substrate parallel to the edge of the base film.

公开(公告)号：US20240088003A1

公开(公告)日：2024-03-14

申请号：US18318827

申请日：2023-05-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Narae SHIN ,  Youngbae KIM ,  Youngjun YOON ,  Jeongkyu HA

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204

Abstract: A semiconductor package includes a film substrate; a plurality of wires on an upper surface of the film substrate; an upper insulating film covering the plurality of wires on the upper surface of the film substrate and defining a plurality of pad openings and a mounting region opening such that, the plurality of pad openings expose at least a portion of an outer lead bonding portion of the plurality of wires along at least one of the first side surface or the second side surface and the mounting region opening exposes at least a portion of an inner lead bonding portion of the plurality of wiring; a semiconductor chip bonded to and electrically connected to the exposed inner lead bonding portion, and at least one support pattern on a lower surface of the film substrate and extending in the first direction to overlap with the plurality of pad openings.

公开(公告)号：US20250062178A1

公开(公告)日：2025-02-20

申请号：US18748463

申请日：2024-06-20

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： Kyoungsuk YANG ,  Jeongkyu HA

IPC: H01L23/36 ,  H01L23/00 ,  H01L23/498

Abstract: A semiconductor package includes: a film substrate having a chip mounting area, and extending in a first direction; a plurality of wirings provided on the film substrate, and including a metal lead portion having an inner lead bonding portion and an outer lead bonding portion, wherein the inner lead bonding portion is at least partially disposed within the chip mounting area, and the outer lead bonding portion from the inner lead bonding portion; an upper insulating layer covering the plurality of wirings, and having a mounting area opening that exposes at least a portion of the inner lead bonding portion; a semiconductor chip disposed on the chip mounting area of the film substrate, and bonded to the exposed inner lead bonding portion; and a heat dissipation member on the upper insulating layer, and including a plurality of first extension patterns extending within the through opening to cover the semiconductor chip.