公开(公告)号：US20130260562A1

公开(公告)日：2013-10-03

申请号：US13733376

申请日：2013-01-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joon-Soo PARK ,  Jongchul PARK ,  Cheolhong KIM ,  Seokwoo NAM ,  Kukhan YOON

IPC: H01L21/308

CPC classification number: H01L21/308 ,  H01L21/0337 ,  H01L27/10852 ,  H01L28/92

Abstract: A method may include forming first hard mask patterns and second hard mask patterns extending in a first direction and repeatedly and alternately arranged on a lower layer, forming third mask patterns extending in a second direction perpendicular to the first direction on the first and second hard mask patterns, etching the first hard mask patterns using the third mask patterns to form first openings, forming filling patterns filling the first openings and gap regions between the third mask patterns, forming spacers on both sidewalls of each of the filling patterns, after removing the third mask patterns, and etching the second hard mask patterns using the filling patterns and the spacers to form second openings.

Abstract translation: 一种方法可以包括形成第一硬掩模图案和在第一方向上延伸并重复并交替地布置在下层上的第一硬掩模图案和第二硬掩模图案，在第一和第二硬掩模上形成沿垂直于第一方向的第二方向延伸的第三掩模图案 使用第三掩模图案蚀刻第一硬掩模图案以形成第一开口，形成填充第一开口和第三掩模图案之间的间隙区域的填充图案，在移除第三掩模图案的每个填充图案的两个侧壁上之后形成间隔物 掩模图案，并且使用填充图案和间隔件蚀刻第二硬掩模图案以形成第二开口。

公开(公告)号：US20130260559A1

公开(公告)日：2013-10-03

申请号：US13799125

申请日：2013-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joon-Soo PARK ,  Kukhan YOON ,  Joon KIM ,  Cheolhong KIM ,  Seokwoo NAM

IPC: H01L21/308

CPC classification number: H01L21/3083 ,  H01L21/0331 ,  H01L21/0337 ,  H01L21/31144 ,  H01L27/10817 ,  H01L27/10891 ,  H01L27/11556 ,  H01L27/24 ,  H01L28/91

Abstract: Methods of forming fine patterns are provided. The methods may include forming first hard mask patterns extending in a first direction on a lower layer, forming second hard mask patterns filling gap regions between the first hard mask patterns, forming first mask patterns extending in a second direction perpendicular to the first direction on the first and second hard mask patterns, etching the first hard mask patterns using the first mask patterns as etch masks to form first openings, forming second mask patterns filling the first openings and extending in the second direction, and etching the second hard mask patterns using the second mask patterns as etch masks to form second openings spaced apart from the first openings in a diagonal direction with respect to the first direction.

Abstract translation: 提供形成精细图案的方法。 所述方法可以包括形成在下层上沿着第一方向延伸的第一硬掩模图案，形成填充第一硬掩模图案之间的间隙区域的第二硬掩模图案，形成沿垂直于第一方向的第二方向延伸的第一掩模图案 第一和第二硬掩模图案，使用第一掩模图案蚀刻第一硬掩模图案作为蚀刻掩模以形成第一开口，形成填充第一开口并在第二方向上延伸的第二掩模图案，以及使用 第二掩模图案作为蚀刻掩模，以在相对于第一方向的对角线方向上形成与第一开口间隔开的第二开口。

公开(公告)号：US20130230961A1

公开(公告)日：2013-09-05

申请号：US13688840

申请日：2012-11-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyong-Soo KIM ,  Byoung-Yong GWAK ,  Kukhan YOON

IPC: H01L49/02

CPC classification number: H01L28/60 ,  H01L27/10805 ,  H01L27/10852 ,  H01L28/91

Abstract: According to example embodiments of inventive concepts, method of forming a semiconductor memory devices includes sequentially forming a first mold layer, a first support layer, a second mold layer, and a second support layer on a substrate, forming lower electrodes penetrating the second support layer, the second mold layer, the first support layer, and the first mold layer on the substrate, patterning the second support layer to form a second support pattern including an opening, removing the second mold layer to expose portions of sidewalls of the lower electrodes, and etching the exposed sidewalls of the lower electrodes.

Abstract translation: 根据本发明构思的示例性实施例，形成半导体存储器件的方法包括在衬底上顺序地形成第一模具层，第一支撑层，第二模具层和第二支撑层，形成穿透第二支撑层的下部电极 第二模具层，第一支撑层和第一模具层，图案化第二支撑层以形成包括开口的第二支撑图案，去除第二模具层以暴露下部电极的侧壁部分， 并蚀刻下电极的暴露的侧壁。