公开(公告)号：US11990343B2

公开(公告)日：2024-05-21

申请号：US17288190

申请日：2019-12-06

Applicant: MACOM Technology Solutions Holdings, Inc.

Inventor： Wayne Mack Struble ,  Timothy Edward Boles ,  Jason Matthew Barrett ,  John Stephen Atherton

IPC: H01L21/285 ,  H01L21/033 ,  H01L29/20 ,  H01L29/40

CPC classification number: H01L21/28575 ,  H01L21/0331 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/402

Abstract: A method of manufacturing an electrode structure for a device, such as a GaN or AlGaN device is described. In one example, the method includes providing a substrate (212) of GaN or AlGaN with a surface region of the GaN or AlGaN exposed through an opening (216) in a layer of silicon nitride (214) formed on the substrate. The method further includes depositing layers of W (222), in one example, or Ni (220) and W (222), in another example, on the substrate and the layer of silicon nitride using reactive evaporation and photoresist layers (230) having an undercut profile for liftoff. The method further includes removing the photoresist layers having the undercut profile, and depositing layers of WN (224) and Al over the underlying layers of W or Ni and W by sputtering.

公开(公告)号：US20180173345A1

公开(公告)日：2018-06-21

申请号：US15894873

申请日：2018-02-12

Applicant: Ethan Pfeiffer

Inventor： Ethan Pfeiffer

IPC: G06F3/044 ,  B81C1/00 ,  H01L21/033 ,  B82Y40/00

CPC classification number: G06F3/044 ,  B81C1/00476 ,  B82Y40/00 ,  C23F1/16 ,  G06F2203/04103 ,  H01L21/0331 ,  Y10S148/10 ,  Y10S977/856 ,  Y10S977/857 ,  Y10S977/893

Abstract: This disclosure teaches a method for producing a nano metal mesh. A brittle layer can be deposited onto a flexible substrate, the brittle layer having a thickness on the flexible substrate. The flexible substrate can be bent to produce a plurality of gaps on the brittle material. A material can be deposited at the surface of the flexible substrate filling the gaps of the brittle layer. Then, the brittle layer can be etched from the flexible substrate using an etchant, a nano metal mesh formed by the material previously in the gaps. The disclosure also teaches a nano metal mesh made using this method.

公开(公告)号：US20180124926A1

公开(公告)日：2018-05-03

申请号：US15794863

申请日：2017-10-26

Applicant: Board of Regents, The University of Texas System

Inventor： Romil Modi ,  Jonathan Reeder ,  Gregory T. Ellson ,  Walter Voit ,  Alexandra Joshi Imre

IPC: H05K3/40 ,  H05K3/04 ,  H05K3/06 ,  H05K1/11 ,  H05K1/03 ,  H05K3/00 ,  H05K3/12 ,  H05K1/09

CPC classification number: H05K3/4007 ,  H01L21/0331 ,  H05K1/0393 ,  H05K1/09 ,  H05K1/111 ,  H05K3/0041 ,  H05K3/048 ,  H05K3/064 ,  H05K3/067 ,  H05K3/1216 ,  H05K3/1225 ,  H05K3/1283 ,  H05K3/3463 ,  H05K2203/043 ,  H05K2203/087 ,  H05K2203/166

Abstract: Flexible electrical devices comprising electrode layers on softening polymers and methods of manufacturing such devices, including lift-off processes for forming electrodes on softening polymers, processes for forming devices with a patterned double softening polymer layer, and solder reflow processes for forming electrical contacts on softening polymers.

公开(公告)号：US09728413B2

公开(公告)日：2017-08-08

申请号：US14400931

申请日：2013-12-04

Applicant: BOE Technology Group Co., Ltd. ,  CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Yuqing Yang ,  Seung Yik Park ,  Byung Chun Lee

IPC: H01L21/283 ,  H01L21/285 ,  H01L31/18 ,  G06F3/041 ,  H01L21/033 ,  H01L21/28 ,  H01L27/12 ,  H01L29/43

CPC classification number: H01L21/2855 ,  G06F3/041 ,  G06F2203/04103 ,  H01L21/0331 ,  H01L21/28008 ,  H01L27/1259 ,  H01L29/43 ,  H01L31/1884 ,  H01L2924/0002 ,  Y02E10/50 ,  H01L2924/00

Abstract: A method for preparing film patterns; firstly, a complementary film pattern (1) to a desired film pattern (201) is prepared on a substrate (3) with an erasable agent; secondly, a whole layer of film (2) is formed on the complementary film pattern (1); and thirdly, the desired film pattern (201) is obtained by removing the complementary film pattern (1). The preparation method can simplify the production process and reduce the production cost of the film patterns.

公开(公告)号：US09496222B2

公开(公告)日：2016-11-15

申请号：US14173906

申请日：2014-02-06

Applicant: FUJITSU LIMITED

Inventor： Junichi Kon ,  Yoshihiro Nakata ,  Kozo Makiyama

IPC: H01L23/52 ,  H01L23/532 ,  H01L23/522 ,  H01L29/423 ,  H01L29/66 ,  H01L21/02 ,  H01L21/027 ,  H01L21/033 ,  H01L21/285 ,  H01L29/20

CPC classification number: H01L23/5329 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02282 ,  H01L21/0272 ,  H01L21/0331 ,  H01L21/28587 ,  H01L23/5222 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L2924/0002 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor device has a structure including a substrate, a first insulating film formed over a part of a principal plane of the substrate, a conductive portion formed over a surface of the first insulating film, and a second insulating film which covers the principal plane of the substrate, the first insulating film, and the conductive portion and whose moisture resistance is higher than moisture resistance of the first insulating film. The first insulating film is placed between the substrate and the conductive portion to prevent the generation of parasitic capacitance. The first insulating film is covered with the second insulating film whose moisture resistance is higher than the moisture resistance of the first insulating film. The second insulating film prevents the first insulating film from absorbing moisture.

Abstract translation: 半导体器件具有包括基板，形成在基板的主平面的一部分上的第一绝缘膜，形成在第一绝缘膜的表面上的导电部分和覆盖第一绝缘膜的主平面的第二绝缘膜的结构 基板，第一绝缘膜和导电部分，并且其耐湿性高于第一绝缘膜的耐湿性。 第一绝缘膜被放置在基板和导电部分之间以防止寄生电容的产生。 第一绝缘膜被第一绝缘膜的耐湿性高于第一绝缘膜的第二绝缘膜覆盖。 第二绝缘膜防止第一绝缘膜吸收水分。

公开(公告)号：US09472714B2

公开(公告)日：2016-10-18

申请号：US14566782

申请日：2014-12-11

Applicant: EPISTAR CORPORATION

Inventor： Hsing-Kuo Hsia ,  Chih-Kuang Yu ,  Gordon Kuo

IPC: H01L21/00 ,  H01L33/00 ,  H01L33/32 ,  H01L33/38 ,  H01L33/60 ,  H01L21/033 ,  H01L21/027 ,  H01L51/00

CPC classification number: H01L33/0079 ,  H01L21/0272 ,  H01L21/0331 ,  H01L33/0066 ,  H01L33/0095 ,  H01L33/32 ,  H01L33/38 ,  H01L33/60 ,  H01L51/0016 ,  H01L2933/0016 ,  H01L2933/0058

Abstract: Provided is a method of fabricating a light-emitting diode (LED) device. A wafer is provided. The wafer has a sapphire substrate and a semiconductor layer formed on the sapphire substrate. The semiconductor layer contains a plurality of un-separated LED dies. A photo-sensitive layer is formed over the semiconductor layer. A photolithography process is performed to pattern the photo-sensitive layer into a plurality of patterned portions. The patterned portions are separated by a plurality of openings that are each substantially aligned with one of the LED dies. A metal material is formed in each of the openings. The wafer is radiated in a localized manner such that only portions of the wafer that are substantially aligned with the openings are radiated. The sapphire substrate is removed along with un-radiated portions of the semiconductor layer, thereby separating the plurality of LED dies into individual LED dies.

Abstract translation: 提供一种制造发光二极管（LED）装置的方法。 提供晶片。 晶片具有形成在蓝宝石衬底上的蓝宝石衬底和半导体层。 半导体层包含多个未分离的LED管芯。 在半导体层上形成光敏层。 执行光刻工艺以将感光层图案化成多个图案部分。 图案化部分由多个开口分开，每个开口基本上与LED管芯中的一个对准。 在每个开口中形成金属材料。 以局部方式照射晶片，使得只有基本上与开口对准的晶片的部分被辐射。 蓝宝石衬底与半导体层的未辐射部分一起被去除，从而将多个LED管芯分离成单独的LED管芯。

公开(公告)号：US20150311072A1

公开(公告)日：2015-10-29

申请号：US14692231

申请日：2015-04-21

Applicant: Gasp Solar ApS ,  UCL Business PLC

Inventor： Martin Aagesen ,  Yunyan Zhang ,  Jiang Wu ,  Huiyun Liu

IPC: H01L21/02 ,  H01L29/06 ,  H01L21/306 ,  H01L29/20

CPC classification number: H01L21/02603 ,  B82Y40/00 ,  H01L21/02057 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02538 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/0331 ,  H01L21/31144 ,  H01L29/0676 ,  H01L29/20

Abstract: The present invention provides a reproducible preliminary in-situ oxide removal step for patterned self-assisted III-V semiconductor nanowire growth. Here “in-situ” means located within the same treatment environment or apparatus as the nanowire growth process, e.g. with a molecular beam epitaxy (MBE) apparatus or the like. Providing an in-situ process may prevent the formation of a thin oxide layer during transfer of the substrate into the nanowire growth apparatus.

Abstract translation: 本发明提供了用于图案化自助III-V半导体纳米线生长的可再现的初步原位氧化物去除步骤。 这里“原地”表示位于与纳米线生长过程相同的处理环境或装置中，例如， 具有分子束外延（MBE）装置等。 提供原位过程可以防止在将衬底转移到纳米线生长装置中时形成薄的氧化物层。

公开(公告)号：US09034722B2

公开(公告)日：2015-05-19

申请号：US12845292

申请日：2010-07-28

Applicant: Yuichi Minoura ,  Toshihide Kikkawa

Inventor： Yuichi Minoura ,  Toshihide Kikkawa

IPC: H01L21/268 ,  H01L21/306 ,  B82Y20/00 ,  H01L29/06 ,  H01L29/40 ,  H01L29/417 ,  H01L29/66 ,  H01L29/778 ,  H01L21/033 ,  H01L21/02 ,  H01L29/20 ,  H01S5/02 ,  H01S5/024 ,  H01S5/343

CPC classification number: H01L21/30617 ,  B82Y20/00 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02664 ,  H01L21/0331 ,  H01L29/0696 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41758 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/7788 ,  H01S5/0201 ,  H01S5/0216 ,  H01S5/0217 ,  H01S5/02476 ,  H01S5/34333

Abstract: A method for manufacturing a compound semiconductor device so as to separate a first substrate from a compound semiconductor laminated structure which includes forming a first compound semiconductor layer over a first substrate containing AlxGa1-xN (0≦x

Abstract translation: 一种制造化合物半导体器件的方法，用于将第一衬底与化合物半导体层叠结构分离，所述化合物半导体层叠结构包括在包含Al x Ga 1-x N（0＆amp; n 1; x 1）的第一衬底上形成第一化合物半导体层并具有第一带隙 ; 在包含AlyInzGa1-y-zN（0

公开(公告)号：US20150093844A1

公开(公告)日：2015-04-02

申请号：US14566782

申请日：2014-12-11

Applicant: TSMC Solid State Lighting Ltd.

Inventor： Hsing-Kuo Hsia ,  Chih-Kuang Yu ,  Gordon Kuo

IPC: H01L33/00 ,  H01L33/60 ,  H01L33/38 ,  H01L33/32

CPC classification number: H01L33/0079 ,  H01L21/0272 ,  H01L21/0331 ,  H01L33/0066 ,  H01L33/0095 ,  H01L33/32 ,  H01L33/38 ,  H01L33/60 ,  H01L51/0016 ,  H01L2933/0016 ,  H01L2933/0058

Abstract: Provided is a method of fabricating a light-emitting diode (LED) device. A wafer is provided. The wafer has a sapphire substrate and a semiconductor layer formed on the sapphire substrate. The semiconductor layer contains a plurality of un-separated LED dies. A photo-sensitive layer is formed over the semiconductor layer. A photolithography process is performed to pattern the photo-sensitive layer into a plurality of patterned portions. The patterned portions are separated by a plurality of openings that are each substantially aligned with one of the LED dies. A metal material is formed in each of the openings. The wafer is radiated in a localized manner such that only portions of the wafer that are substantially aligned with the openings are radiated. The sapphire substrate is removed along with un-radiated portions of the semiconductor layer, thereby separating the plurality of LED dies into individual LED dies.

Abstract translation: 提供一种制造发光二极管（LED）装置的方法。 提供晶片。 晶片具有形成在蓝宝石衬底上的蓝宝石衬底和半导体层。 半导体层包含多个未分离的LED管芯。 在半导体层上形成光敏层。 执行光刻工艺以将感光层图案化成多个图案部分。 图案化部分由多个开口分开，每个开口基本上与LED管芯中的一个对准。 在每个开口中形成金属材料。 以局部方式照射晶片，使得只有基本上与开口对准的晶片的部分被辐射。 蓝宝石衬底与半导体层的未辐射部分一起被去除，从而将多个LED管芯分离成单独的LED管芯。

公开(公告)号：US08815108B2

公开(公告)日：2014-08-26

申请号：US12593272

申请日：2008-04-03

Applicant: Bruno Remiat ,  Laurent Vandroux ,  Florent Souche

Inventor： Bruno Remiat ,  Laurent Vandroux ,  Florent Souche

IPC: C03C15/00 ,  C03C25/68 ,  H01L21/302 ,  H01L21/461 ,  H01L21/311

CPC classification number: H01L21/0331 ,  H01L21/0271

Abstract: A method of depositing a non-continuous coating of a first material on a substrate, comprising: a) the formation of a mask on this substrate, by forming at least two mask layers, and etching of at least one cavity in these layers, this cavity having an outline such that a coating, deposited on the substrate, through the cavities of the mask, has at least one discontinuity over said outline of the cavity; b) the deposition of the first material on the substrate, through the cavities of the mask, the coating thus deposited having at least one discontinuity over the outline of said cavity; and c) the mask is removed.

Abstract translation: 一种在衬底上沉积第一材料的非连续涂层的方法，包括：a）在该衬底上形成掩模，通过形成至少两个掩模层，以及蚀刻这些层中的至少一个空腔， 空腔具有轮廓，使得通过掩模的空腔沉积在基底上的涂层在空腔的所述轮廓上具有至少一个不连续性; b）通过掩模的空腔将第一材料沉积在基底上，由此沉积的涂层具有在所述腔的轮廓上的至少一个不连续性; 和c）去除掩模。