公开(公告)号：US20130260562A1

公开(公告)日：2013-10-03

申请号：US13733376

申请日：2013-01-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joon-Soo PARK ,  Jongchul PARK ,  Cheolhong KIM ,  Seokwoo NAM ,  Kukhan YOON

IPC: H01L21/308

CPC classification number: H01L21/308 ,  H01L21/0337 ,  H01L27/10852 ,  H01L28/92

Abstract: A method may include forming first hard mask patterns and second hard mask patterns extending in a first direction and repeatedly and alternately arranged on a lower layer, forming third mask patterns extending in a second direction perpendicular to the first direction on the first and second hard mask patterns, etching the first hard mask patterns using the third mask patterns to form first openings, forming filling patterns filling the first openings and gap regions between the third mask patterns, forming spacers on both sidewalls of each of the filling patterns, after removing the third mask patterns, and etching the second hard mask patterns using the filling patterns and the spacers to form second openings.

Abstract translation: 一种方法可以包括形成第一硬掩模图案和在第一方向上延伸并重复并交替地布置在下层上的第一硬掩模图案和第二硬掩模图案，在第一和第二硬掩模上形成沿垂直于第一方向的第二方向延伸的第三掩模图案 使用第三掩模图案蚀刻第一硬掩模图案以形成第一开口，形成填充第一开口和第三掩模图案之间的间隙区域的填充图案，在移除第三掩模图案的每个填充图案的两个侧壁上之后形成间隔物 掩模图案，并且使用填充图案和间隔件蚀刻第二硬掩模图案以形成第二开口。

公开(公告)号：US20140183434A1

公开(公告)日：2014-07-03

申请号：US14064826

申请日：2013-10-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hanjin LIM ,  Wonseok YOO ,  Insang JEON ,  Seokwoo NAM ,  Kongsoo LEE ,  Jaejong HAN

IPC: H01L27/24 ,  H01L29/78 ,  H01L29/872

CPC classification number: H01L27/2463 ,  H01L21/2652 ,  H01L21/28518 ,  H01L21/76814 ,  H01L21/76834 ,  H01L23/485 ,  H01L27/2409 ,  H01L29/0847 ,  H01L29/167 ,  H01L29/401 ,  H01L29/456 ,  H01L29/8613 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1273 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor devices, and methods of fabricating the same, include a metal-containing layer on a semiconductor layer, and a barrier-lowering portion between the metal-containing layer and the semiconductor layer. The barrier-lowering portion lowers a Schottky barrier height between the metal-containing layer and the semiconductor layer below a Schottky barrier height between a metal silicide layer and the semiconductor layer.

Abstract translation: 半导体器件及其制造方法包括半导体层上的含金属层和金属含有层与半导体层之间的阻挡降低部。 阻挡降低部将金属含有层与半导体层之间的肖特基势垒高度降低到金属硅化物层与半导体层之间的肖特基势垒高度以下。

公开(公告)号：US20140057440A1

公开(公告)日：2014-02-27

申请号：US13956556

申请日：2013-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joonsoo PARK ,  JungWoo SEO ,  KyoungRyul YOON ,  Cheolhong KIM ,  Seokwoo NAM ,  Yongjik PARK

IPC: H01L21/302

CPC classification number: H01L21/302 ,  H01L21/0337

Abstract: A method of forming a semiconductor device includes first preliminary holes over an etch target, the first preliminary holes arranged as a plurality of rows in a first direction, forming dielectric patterns each filling one of the first preliminary holes, sequentially forming a barrier layer and a sacrificial layer on the dielectric patterns, forming etch control patterns between the dielectric patterns, forming second preliminary holes by etching the sacrificial layer, each of the second preliminary holes being in a region defined by at least three dielectric patterns adjacent to each other, and etching the etch target layer corresponding to positions of the first and second preliminary holes to form contact holes.

Abstract translation: 形成半导体器件的方法包括在蚀刻靶上的第一预备孔，第一预备孔在第一方向上排列成多行，形成各自填充一个第一预备孔的电介质图案，依次形成阻挡层和 在电介质图案上形成牺牲层，在电介质图案之间形成蚀刻控制图案，通过蚀刻牺牲层形成第二预备孔，每个第二预备孔位于由彼此相邻的至少三个电介质图案限定的区域中，以及蚀刻 所述蚀刻目标层对应于所述第一和第二预备孔的位置以形成接触孔。

公开(公告)号：US20130260559A1

公开(公告)日：2013-10-03

申请号：US13799125

申请日：2013-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joon-Soo PARK ,  Kukhan YOON ,  Joon KIM ,  Cheolhong KIM ,  Seokwoo NAM

IPC: H01L21/308

CPC classification number: H01L21/3083 ,  H01L21/0331 ,  H01L21/0337 ,  H01L21/31144 ,  H01L27/10817 ,  H01L27/10891 ,  H01L27/11556 ,  H01L27/24 ,  H01L28/91

Abstract: Methods of forming fine patterns are provided. The methods may include forming first hard mask patterns extending in a first direction on a lower layer, forming second hard mask patterns filling gap regions between the first hard mask patterns, forming first mask patterns extending in a second direction perpendicular to the first direction on the first and second hard mask patterns, etching the first hard mask patterns using the first mask patterns as etch masks to form first openings, forming second mask patterns filling the first openings and extending in the second direction, and etching the second hard mask patterns using the second mask patterns as etch masks to form second openings spaced apart from the first openings in a diagonal direction with respect to the first direction.

Abstract translation: 提供形成精细图案的方法。 所述方法可以包括形成在下层上沿着第一方向延伸的第一硬掩模图案，形成填充第一硬掩模图案之间的间隙区域的第二硬掩模图案，形成沿垂直于第一方向的第二方向延伸的第一掩模图案 第一和第二硬掩模图案，使用第一掩模图案蚀刻第一硬掩模图案作为蚀刻掩模以形成第一开口，形成填充第一开口并在第二方向上延伸的第二掩模图案，以及使用 第二掩模图案作为蚀刻掩模，以在相对于第一方向的对角线方向上形成与第一开口间隔开的第二开口。