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1.发明授权公开(公告)号：US11847339B2
公开(公告)日：2023-12-19
申请号：US17231734
申请日：2021-04-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seong-hoon Woo , Hak-sun Kim , Kwang-jin Lee , Su-chang Jeon
IPC: G06F13/00 , G06F3/06 , G06F13/16 , G11C7/20 , G11C7/22 , G11C16/20 , G11C16/32 , G11C7/10 , G11C16/04
CPC classification number: G06F3/0653 , G06F3/0604 , G06F3/0679 , G06F13/16 , G11C7/1063 , G11C7/20 , G11C7/22 , G11C16/20 , G11C16/32 , G11C16/0483
Abstract: A memory system is provided and includes memory chips in each of which a first state output pin is arranged and a memory controller in which a first state input pin connected to a first channel including first ways respectively connected to the first state output pins arranged in the memory chips is arranged. The memory controller checks a first internal state of each of the memory chips, based on one or more of a chip enable signal and a CE reduction command of the memory chips, and a second signal received through the first state input pin as a result of an AND operation of first signals output through the first state output pins, during a state check interval for checking respective states of the memory chips.
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2.发明授权公开(公告)号：US10346087B2
公开(公告)日：2019-07-09
申请号：US15678759
申请日：2017-08-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seong-hoon Woo , Hak-sun Kim , Kwang-jin Lee , Su-chang Jeon
Abstract: An apparatus for outputting an internal state of a memory apparatus and a memory system using the apparatus are provided. The apparatus includes a state signal generating circuit that generates a first signal indicating an internal operation state of the memory apparatus, and a state signal output control circuit that receives the first signal and outputs a second signal to an output pad based on a chip enable signal or an initially set function command, or both. The first signal indicates one state from among two states and the second signal indicates one state from among three states.
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