公开(公告)号：US11543871B2

公开(公告)日：2023-01-03

申请号：US17239654

申请日：2021-04-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongin Lee ,  Hyuk Lee ,  Seunghyun Choi

IPC: G06F1/3206 ,  G06F1/28

Abstract: A storage device includes a solid state drive (SSD), a field programmable gate array (FPGA), a power sensor and a global controller. The SSD stores data and receives power through a power rail connected to a host device. The FPGA processes data read from the SSD or data to be stored in the SSD and receives power through the power rail. The power sensor is connected to the power rail and generates a measured power value corresponding to a total power consumed by the SSD and the FPGA by measuring the total power. The global controller determines one of the SSD and the FPGA as a priority component operating with a fixed performance and determines the other of the SSD and the FPGA as a non-priority component operating with a variable performance in a priority mode based on power control information provided from the host device.

公开(公告)号：US11971764B2

公开(公告)日：2024-04-30

申请号：US18074615

申请日：2022-12-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongin Lee ,  Hyuk Lee ,  Seunghyun Choi

IPC: G06F1/3206 ,  G06F1/28

CPC classification number: G06F1/3206 ,  G06F1/28

Abstract: A storage device includes a solid state drive (SSD), a field programmable gate array (FPGA), a power sensor and a global controller. The SSD stores data and receives power through a power rail connected to a host device. The FPGA processes data read from the SSD or data to be stored in the SSD and receives power through the power rail. The power sensor is connected to the power rail and generates a measured power value corresponding to a total power consumed by the SSD and the FPGA by measuring the total power. The global controller determines one of the SSD and the FPGA as a priority component operating with a fixed performance and determines the other of the SSD and the FPGA as a non-priority component operating with a variable performance in a priority mode based on power control information provided from the host device.

公开(公告)号：US20240070033A1

公开(公告)日：2024-02-29

申请号：US18238301

申请日：2023-08-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junyeong HAN ,  Kui-Yon Mun ,  Jooyoung Hwang ,  Keunsan Park ,  Gyeongmin Kim ,  Heetak Shin ,  Seunghyun Choi

IPC: G06F11/14 ,  G06F3/06

CPC classification number: G06F11/1451 ,  G06F3/0619 ,  G06F3/0647 ,  G06F3/0652 ,  G06F3/0656 ,  G06F3/0679

Abstract: A storage device, including a nonvolatile memory device including a plurality of memory cells forming a user area and a reserved area; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller includes an internal buffer, wherein the controller is configured to: perform a backup operation by writing first data stored in the internal buffer in a backup erase unit included in the reserved area, and after performing the backup operation adjust a buffering unit of the internal buffer to correspond to a cell type of the backup erase unit.