中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

13 records (took 0.023 seconds)

    Memory controller and storage device including the same
    1.
    发明授权
    Memory controller and storage device including the same 有权

    公开(公告)号：US10564869B2

    公开(公告)日：2020-02-18

    申请号：US16057849

    申请日：2018-08-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kui-Yon Mun ,  Young-Wook Kim ,  Wan-Soo Choi

    IPC: G06F3/06

    Abstract: A method of controlling memory devices of a memory controller, the memory devices including a plurality of memory dies, includes receiving at least one data operation request and a power budget from external of the memory controller; determining respective data operation times of the plurality of memory dies, wherein a power consumption due to at least one data operation in response to the at least one data operation request may be equal to or less than the power budget; and controlling the plurality of memory dies based on the data operation times.

    Storage device communicating with specific pattern and operating method thereof
    5.
    发明授权
    Storage device communicating with specific pattern and operating method thereof 有权

    公开(公告)号：US10095420B2

    公开(公告)日：2018-10-09

    申请号：US14994168

    申请日：2016-01-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jae-Sung Yu ,  Kui-Yon Mun ,  Youngwook Kim

    IPC: G06F12/00 ,  G06F3/06 ,  G06F13/16 ,  G11C29/56 ,  G11C29/02

    Abstract: A storage device includes a memory device configured to store data and a memory controller connected to the memory device through a data strobe line and a plurality of data lines. The storage device adds a predetermined specific pattern in front of data and processes data input following the specific pattern as valid data during a read or write operation. The specific pattern is provided in alignment with a data strobe signal (DQS) latency cycle. The memory controller detects a specific pattern input from the memory device during a read operation and processes data input following the specific pattern as valid data when the detected specific pattern matches an internally stored specific pattern.

    Memory system, memory controller for memory system, operation method of memory controller, and operation method of user device including memory device
    6.
    发明授权
    Memory system, memory controller for memory system, operation method of memory controller, and operation method of user device including memory device 有权

    公开(公告)号：US10649898B2

    公开(公告)日：2020-05-12

    申请号：US15871283

    申请日：2018-01-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jinwoo Kim ,  Kui-Yon Mun ,  Chul Lee

    IPC: G06F12/084 ,  G06F3/06 ,  G06F13/16

    Abstract: A system includes: a nonvolatile memory; a memory controller configured to control the nonvolatile memory, the memory controller including a first buffer memory for temporarily storing write data to be written to the nonvolatile memory; and a second buffer memory having a lower operational speed and a higher memory capacity than the first buffer memory. The memory controller is configured to transmit the write data from the first buffer memory to the second buffer memory and to the nonvolatile memory, and to release an operational state of the first buffer memory after transmitting the write data from the first buffer memory to the second buffer memory and to the nonvolatile memory. Writing additional write data to the first buffer memory is prohibited prior to the release of the operational state of the first buffer memory, and is permitted after the release of the operational state of the first buffer memory.

    STORAGE DEVICE COMMUNICATING WITH SPECIFIC PATTERN AND OPERATING METHOD THEREOF
    8.
    发明申请
    STORAGE DEVICE COMMUNICATING WITH SPECIFIC PATTERN AND OPERATING METHOD THEREOF 审中-公开
    存储设备与特定模式通信及其操作方法

    公开(公告)号：US20160239220A1

    公开(公告)日：2016-08-18

    申请号：US14994168

    申请日：2016-01-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jae-Sung Yu ,  Kui-Yon Mun ,  Youngwook Kim

    IPC: G06F3/06 ,  G11C29/56 ,  G11C8/18

    CPC classification number: G06F3/0611 ,  G06F3/0619 ,  G06F3/0655 ,  G06F3/0688 ,  G06F13/1689 ,  G11C29/021 ,  G11C29/023 ,  G11C29/028 ,  G11C29/56004

    Abstract: A storage device includes a memory device configured to store data and a memory controller connected to the memory device through a data strobe line and a plurality of data lines. The storage device adds a predetermined specific pattern in front of data and processes data input following the specific pattern as valid data during a read or write operation. The specific pattern is provided in alignment with a data strobe signal (DQS) latency cycle. The memory controller detects a specific pattern input from the memory device during a read operation and processes data input following the specific pattern as valid data when the detected specific pattern matches an internally stored specific pattern.

    Abstract translation: 存储装置包括被配置为存储数据的存储器件和通过数据选通线和多条数据线连接到存储器件的存储器控​​制器。 存储装置在数据前面增加预定的特定模式，并且在读取或写入操作期间将跟随特定模式输入的数据作为有效数据进行处理。 提供特定模式与数据选通信号（DQS）延迟周期对齐。 存储器控制器在读取操作期间检测来自存储器件的特定模式输入，并且当检测到的特定模式与内部存储的特定模式匹配时，将特定模式之后的数据输入作为有效数据进行处理。

Patent Agency Ranking