公开(公告)号：US20240321775A1

公开(公告)日：2024-09-26

申请号：US18614285

申请日：2024-03-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Shlege LEE ,  Hyunggil BAEK ,  Minwoo CHO

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/64 ,  H01L25/10 ,  H10B80/00

CPC classification number: H01L23/562 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/642 ,  H01L25/105 ,  H10B80/00 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204

Abstract: A semiconductor package comprises: a first package substrate; a semiconductor device mounted on a first surface of the first package substrate and connected to the first package substrate; a plurality of connection pads on a second surface of the first package substrate; a plurality of external connection terminals respectively disposed on one or more connection pads of the plurality of connection pads; a plurality of passive elements mounted on one or more connection pads of the plurality of connection pads in which the plurality of external connection terminals are not disposed; and a floating structure disposed between at least one passive element from the plurality of passive elements and at least one external connection terminal from the plurality of external connection terminals, spaced apart from the at least one passive element and the at least one external connection terminal, and disposed on the second surface of the first package substrate.

公开(公告)号：US20250038095A1

公开(公告)日：2025-01-30

申请号：US18739548

申请日：2024-06-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junho LEE ,  Insik HAN ,  Shlege LEE

IPC: H01L23/498 ,  H01L21/768 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package includes: a package substrate having a first surface and a second surface, wherein the package substrate includes a plurality of first substrate pads and a plurality of second substrate pads that are electrically connected to each other; a semiconductor device mounted on the package substrate and electrically connected to the plurality of first substrate pads; conductive bumps disposed on the plurality of second substrate pads, wherein each of the conductive bumps includes a bump body and a conductive member, wherein the bump body has a first melting point, and the conductive member at least partially surrounds the bump body and has a second melting point that is lower than the first melting point; and a semiconductor element mounted on the package substrate, wherein the semiconductor element has metal oxide barriers that are provided on the conductive members and a side surface of the semiconductor element.