公开(公告)号：US20230141775A1

公开(公告)日：2023-05-11

申请号：US17984382

申请日：2022-11-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soo-Young JI

IPC: H05K7/20 ,  G06F1/20

CPC classification number: H05K7/20272 ,  G06F1/20

Abstract: A storage device includes: a memory device; a memory controller; and a cooling unit configured to guide a flow of a cooling material to the memory controller, wherein the cooling unit includes a housing, a guide member, and a pump, wherein the housing covers the memory controller and includes a first point and a second point, wherein the first point is disposed at a first side of the housing, wherein the second point is disposed at a second side of the housing that is below the first side of the housing, wherein the guide member is attached to the housing and guides the flow of the cooling material from the first point toward the second point, and wherein the pump is configured to adjust an amount of the cooling material flowing from the first point to the second point.

公开(公告)号：US20230141583A1

公开(公告)日：2023-05-11

申请号：US17874734

申请日：2022-07-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo-Young JI

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0679 ,  G06F3/0653

Abstract: A storage device is provided. A storage device includes a non-volatile memory including a plurality of memory segments, and a storage controller connected to the non-volatile memory through a plurality of channels, each of the plurality of channels connected to a respective one of the plurality of memory segments such that each of the plurality of channels has a respective associated memory segment, wherein the storage controller is configured to generate parity according to speed information received from a host with respect to data to be written to the non-volatile memory and store the parity in at least one of the memory segments.

公开(公告)号：US20230384946A1

公开(公告)日：2023-11-30

申请号：US18196671

申请日：2023-05-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soo-Young JI ,  Younggeon YOO ,  Sang-Hwa JIN

IPC: G06F3/06 ,  G06F1/30

CPC classification number: G06F3/0619 ,  G06F3/0631 ,  G06F3/0673 ,  G06F1/30

Abstract: The present disclosure provides methods and apparatuses for data loss prevention of a storage device. In some embodiments, the data loss preventing method includes receiving, from a host system, a query plan corresponding to necessary data to be stored in a volatile memory. The data loss preventing method further includes generating, based on the query plan, a data priority list corresponding to the necessary data. The data loss preventing method further includes selecting, based on the data priority list, at least one portion of the volatile memory, when a main power supplied by the host system drops to or below a power level threshold. The data loss preventing method further includes moving the necessary data to the at least one portion of the volatile memory.

公开(公告)号：US20230222067A1

公开(公告)日：2023-07-13

申请号：US17969400

申请日：2022-10-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soo-Young JI

IPC: G06F12/0891

CPC classification number: G06F12/0891 ,  G06F2212/604

Abstract: The present disclosure provides methods, apparatuses, and servers for cache-coherence. In some embodiments, an apparatus includes a plurality of compute express link (CXL) devices, and a switch. Each CXL device of the plurality of CXL devices includes a memory in which a portion of the memory is allocated as a cache buffer, to which different cache eviction policies are allocated. The different cache eviction policies are modified according to a cache hit ratio of the cache buffer. The switch is configured to connect the plurality of CXL devices to each other.

公开(公告)号：US20230222062A1

公开(公告)日：2023-07-13

申请号：US18086252

申请日：2022-12-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soo-Young JI

IPC: G06F12/0815 ,  G06F12/0871

CPC classification number: G06F12/0815 ,  G06F12/0871

Abstract: An apparatus including: a plurality of compute express link (CXL) devices each including a memory and a processor for processing works stored in the memory; and a switch configured to connect the CXL devices to each other, wherein a first CXL device among the plurality of CXL devices selects at least one second CXL device from at least some CXL devices of the plurality of CXL devices to distribute works stored in a memory of the first CXL device based on a usable capacity of a memory of the at least some CXL devices.

公开(公告)号：US20240004579A1

公开(公告)日：2024-01-04

申请号：US18134698

申请日：2023-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： Soo-Young JI ,  Min-Ho Kim ,  Dongouk Moon ,  Sang-Hwa Jin

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/0679 ,  G06F3/0604

Abstract: Disclosed are a computational storage device, an electronic system and an electronic device. The computational storage device includes a nonvolatile memory, a buffer memory, and a storage controller. The storage controller communicates with the nonvolatile memory and the buffer memory. The storage controller performs computational processing and data format conversion on first data input to the storage controller based on a storage processing table associated with an external electronic device to output second data.

公开(公告)号：US20230384848A1

公开(公告)日：2023-11-30

申请号：US18305474

申请日：2023-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo-Young JI ,  Younggeon Yoo ,  Brianmyungjune Jung ,  Sung Chul Hur

IPC: G06F1/26 ,  G06F1/30

CPC classification number: G06F1/263 ,  G06F1/305

Abstract: Disclosed is a storage device including a non-volatile memory that inputs or outputs data at a request of a host system, a volatile memory that temporarily stores data input to or output from the non-volatile memory, an internal spare power source that supplies power to a part of the volatile memory in response to main power supplied from the host system dropping to a first amount or less, and a storage controller that controls the non-volatile memory and the volatile memory. The storage controller is configured to divide the volatile memory into area-received-duplication-power, and at least one area-received-spare-power, in response to the main power dropping to the first amount or less, to redundantly supply spare power to the area-received-duplication-power from an external spare power source and the internal spare power source, and to supply the spare power to the at least one area-received-spare-power from the external spare power source.

公开(公告)号：US20230129606A1

公开(公告)日：2023-04-27

申请号：US17752004

申请日：2022-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soo-Young JI

IPC: G06F12/02

Abstract: A storage device having improved performance and efficiency is provided. A storage device includes a controller configured to receive a pre-processing instruction command from an external device, a non-volatile memory configured to store an original graph data, and a buffer memory connected to the controller and the non-volatile memory, wherein the controller is configured to load the original graph data from the non-volatile memory, generate pre-processing graph data by classifying the original graph data depending on vector similarity in response to the pre-processing instruction command, generate metadata on the basis of the pre-processing graph data, and provide the pre-processing graph data and the metadata to the non-volatile memory, the non-volatile memory is configured to store the pre-processing graph data and the metadata in a data block, and the buffer memory is configured to buffer the original graph data, the pre-processing graph data, and the metadata.