公开(公告)号：US20190287797A1

公开(公告)日：2019-09-19

申请号：US16422375

申请日：2019-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-suk TAK ,  Tae-jong LEE ,  Bon-young KOO ,  Ki-yeon PARK ,  Sung-hyun CHOI

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/30 ,  H01L29/66 ,  H01L29/49 ,  H01L27/11 ,  H01L27/092

Abstract: A method of forming a SiOCN material layer, a material layer stack, a semiconductor device, a method of fabricating a semiconductor device, and a deposition apparatus, the method of forming a SiOCN material layer including providing a substrate; providing a silicon precursor onto the substrate; providing an oxygen reactant onto the substrate; providing a first carbon precursor onto the substrate; providing a second carbon precursor onto the substrate; and providing a nitrogen reactant onto the substrate, wherein the first carbon precursor and the second carbon precursor are different materials.

公开(公告)号：US20170221893A1

公开(公告)日：2017-08-03

申请号：US15390361

申请日：2016-12-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong-suk TAK ,  Tae-jong LEE ,  Gi-gwan PARK ,  Ji-myoung LEE

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L21/8234 ,  H01L21/02 ,  H01L27/02 ,  H01L29/08

CPC classification number: H01L27/0886 ,  H01L21/0217 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L21/8258 ,  H01L27/0207 ,  H01L27/088 ,  H01L29/0649 ,  H01L29/0665 ,  H01L29/0847 ,  H01L29/42376

Abstract: An integrated circuit device includes: a pair of width-setting patterns over a substrate, the pair of width-setting patterns defining a width of a gate structure space in a first direction and extending in a second direction intersecting with the first direction. A gate electrode layer is provided that extends in the gate structure space along the second direction. A gate insulating layer is provided in the gate structure space and between the substrate and the gate electrode layer. An insulating spacer is provides on the pair of width-setting patterns, the insulating spacer covering both sidewalls of the gate electrode layer, wherein the pair of width-setting patterns have a carbon content that is greater than a carbon content of the insulating spacer.

公开(公告)号：US20170117140A1

公开(公告)日：2017-04-27

申请号：US15296220

申请日：2016-10-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-suk TAK ,  Tae-jong LEE ,  Bon-young KOO ,  Ki-yeon PARK ,  Sung-hyun CHOI

IPC: H01L21/02 ,  H01L29/49 ,  C23C16/455 ,  H01L27/092 ,  H01L27/11 ,  H01L21/28 ,  H01L29/66 ,  H01L29/78

Abstract: A method of forming a SiOCN material layer, a material layer stack, a semiconductor device, a method of fabricating a semiconductor device, and a deposition apparatus, the method of forming a SiOCN material layer including providing a substrate; providing a silicon precursor onto the substrate; providing an oxygen reactant onto the substrate; providing a first carbon precursor onto the substrate; providing a second carbon precursor onto the substrate; and providing a nitrogen reactant onto the substrate, wherein the first carbon precursor and the second carbon precursor are different materials.