公开(公告)号：US20240248636A1

公开(公告)日：2024-07-25

申请号：US18225980

申请日：2023-07-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwanhyo KIM ,  Taec-Jun KIM

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: A controller of a storage system, includes a plurality of modules each including an intellectual property (IP) module and a core module, wherein, based on the IP module operating as a master for a first module of the plurality of modules, an idle clock of the first module is a first clock, wherein based on the core module operating as a master for a second module of the plurality of modules, an idle clock of the second module is a second clock, wherein a clock frequency of the first clock is greater than zero and smaller than a maximum clock frequency, and wherein a clock frequency of the second clock is zero.

公开(公告)号：US20150046638A1

公开(公告)日：2015-02-12

申请号：US14451953

申请日：2014-08-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wan-Soo CHOI ,  Taec-Jun KIM ,  Sang-Wook NAM ,  Jae-Hwa LEE

IPC: G11C16/10

CPC classification number: G11C11/5628 ,  G11C16/06 ,  G11C16/10 ,  G11C16/3418

Abstract: A program method of a multi-bit memory device is provided. First page data is programmed in a first region of a memory cell array. The first page data is stored in a first buffer of a page buffer. Second page data is programmed in the first region of the memory cell array. The second page data is stored in a third buffer of the page buffer. Third page data is stored in the first region of the memory cell array. The second page data stored in the third buffer is transferred to a second buffer of the page buffer and the third page data is stored in the third buffer. The first to third page data stored in page buffer are programmed in a second region of the memory cell array.

Abstract translation: 提供了一种多位存储器件的编程方法。 第一页数据被编程在存储单元阵列的第一区域中。 第一页数据存储在页缓冲器的第一缓冲器中。 第二页数据被编程在存储单元阵列的第一区域中。 第二页数据存储在页缓冲器的第三缓冲器中。 第三页数据存储在存储单元阵列的第一区域中。 存储在第三缓冲器中的第二页数据被传送到页缓冲器的第二缓冲器，并且第三页数据被存储在第三缓冲器中。 存储在页面缓冲器中的第一到第三页数据被编程在存储单元阵列的第二区域中。