公开(公告)号：US20200243521A1

公开(公告)日：2020-07-30

申请号：US16848902

申请日：2020-04-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taewon HA ,  Juyoun KIM ,  Sang Min LEE ,  Moon-Sun HONG ,  Seki HONG

IPC: H01L27/088 ,  H01L21/8234 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L29/51 ,  H01L21/28

Abstract: A semiconductor device includes a substrate having an active region, and first to third transistors on the active region of the substrate, each of the first to third transistors including a dielectric layer on the substrate, a metal layer on the dielectric layer, a barrier layer between the dielectric layer and the metal layer, and a work function layer between the dielectric layer and the barrier layer, wherein the barrier layer of the third transistor is in contact with the dielectric layer of the third transistor, and wherein a threshold voltage of the second transistor is greater than a threshold voltage of the first transistor and less than a threshold voltage of the third transistor.

公开(公告)号：US20190189613A1

公开(公告)日：2019-06-20

申请号：US16174702

申请日：2018-10-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taewon HA ,  Juyoun KIM ,  Sang Min LEE ,  Moon-Sun HONG ,  Seki HONG

IPC: H01L27/088 ,  H01L21/28 ,  H01L29/51 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234

CPC classification number: H01L27/0886 ,  H01L21/28158 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823462 ,  H01L29/41791 ,  H01L29/517 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device includes a substrate having an active region, and first to third transistors on the active region of the substrate, each of the first to third transistors including a dielectric layer on the substrate, a metal layer on the dielectric layer, a barrier layer between the dielectric layer and the metal layer, and a work function layer between the dielectric layer and the barrier layer, wherein the barrier layer of the third transistor is in contact with the dielectric layer of the third transistor, and wherein a threshold voltage of the second transistor is greater than a threshold voltage of the first transistor and less than a threshold voltage of the third transistor.