Semiconductor device
    1.
    发明授权

    公开(公告)号:US12040402B2

    公开(公告)日:2024-07-16

    申请号:US17690178

    申请日:2022-03-09

    CPC classification number: H01L29/7851 H01L27/0886 H01L29/0649 H01L29/41791

    Abstract: A semiconductor device including first fin-shaped patterns in a first region of a substrate and spaced apart from each other in a first direction, second fin-shaped patterns in a second region of the substrate and spaced apart from each other in a second direction, a first field insulating film on the substrate and covering sidewalls of the first fin-shaped patterns, a second field insulating film on the substrate and covering sidewalls of the second fin-shaped patterns, a first source/drain pattern on the first field insulating film, connected to the first fin-shaped patterns, and including a first silicon-germanium pattern, and a second source/drain pattern on the second field insulating film, connected to the second fin-shaped patterns, and including a second silicon-germanium pattern, the second source/drain pattern and the second field insulating film defining one or more first air gaps therebetween may be provided.

    SEMICONDUCTOR DEVICE
    2.
    发明公开

    公开(公告)号:US20230145260A1

    公开(公告)日:2023-05-11

    申请号:US17831513

    申请日:2022-06-03

    CPC classification number: H01L29/7851 H01L29/0649 H01L29/41791

    Abstract: A semiconductor device including: a plurality of fin-shaped patterns spaced apart from each other in a first direction and extending in a second direction on a substrate; a field insulating layer covering sidewalls of the plurality of fin-shaped patterns and disposed between the fin-shaped patterns; a source/drain pattern connected to the plurality of fin-shaped patterns on the field insulating layer, the source/drain pattern including bottom surfaces respectively connected to the fin-shaped patterns, and at least one connection surface connecting the bottom surfaces to each other; and a sealing insulating pattern extending along the connection surface of the source/drain pattern and an upper surface of the field insulating layer, wherein the source/drain pattern includes a silicon-germanium pattern doped with a p-type impurity.

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