公开(公告)号：US3623015A

公开(公告)日：1971-11-23

申请号：US3623015D

申请日：1969-09-29

Applicant: SANDERS ASSOCIATES INC

Inventor： SCHMITZ HERBERT E ,  LABAUGH KENNETH D

IPC: G06F17/18 ,  G06F7/02 ,  G06F15/18

CPC classification number: G06F17/18

Abstract: A pattern recognition system which employs three similar addressable memories. Data representing an upper limit distribution pattern of a series of measurements on a particular parameter is stored in one memory, while data reflecting a lower limit distribution pattern of the measurements on the same parameter is contained in the second memory. Then new data reflecting additional parameter measurements is loaded into the third memory and compared with the data in the other two memories to see if this new data ''''fits'''' within the acceptance zone defined by the upper and lower limit patterns. If there is a fit, then the system emits a recognition signal which indicates that the additional parameter measurements belong to the same parameter set which established the original upper and lower limit patterns. Following this, the upper and lower limit patterns contained in the first and second memories are updated to include the new data, and then more parameter measurements are made and compared with the updated acceptance zone. This process continues with still more incoming measurement data so that the upper and lower limit patterns are continually modified to accommodate long term changes in the pattern to be recognized.

公开(公告)号：US3500362A

公开(公告)日：1970-03-10

申请号：US3500362D

申请日：1965-08-23

Applicant: SANDERS ASSOCIATES INC

Inventor： SCHMITZ HERBERT E ,  WOODRUFF THOMAS E

IPC: G11B20/14 ,  G11B5/00

CPC classification number: G11B20/1419

公开(公告)号：US3627927A

公开(公告)日：1971-12-14

申请号：US3627927D

申请日：1969-11-24

Applicant: SANDERS ASSOCIATES INC

Inventor： SCHMITZ HERBERT E ,  BLEAU ROBERT A

IPC: H01H13/702 ,  H01H13/785 ,  H01H13/807 ,  H04L15/16

CPC classification number: H01H13/807 ,  B41J5/08 ,  H01H13/702 ,  H01H13/785 ,  H01H2201/026 ,  H01H2203/032 ,  H01H2207/024 ,  H01H2209/002 ,  H01H2215/002 ,  H01H2217/018 ,  H01H2219/028 ,  H01H2221/026 ,  H01H2221/042 ,  H01H2223/002 ,  H01H2223/034 ,  H01H2223/036 ,  H01H2225/008 ,  H01H2225/022 ,  H01H2229/028 ,  H01H2229/034 ,  H01H2239/05

Abstract: A monolithic keyboard constructed in layers with inexpensive materials and which has no conventional moving parts is disclosed. In one embodiment, the layers include a bottom or first layer of conductive material, a second layer of spongy material with holes cut therein, and a third layer of flexible printed circuit. This flexible printed circuit includes a sheet of insulating material with conductive pads placed thereunder in registration with the holes in the spongy material. Key symbols are etched on or printed over the conductive pads thereby indicating the placement of the keys. Depressing the key causes contact to be made between the respective pad and the first layer of conductive material. The spongy material gives the operator the ''''touch'''' of a standard typewriter keyboard.

公开(公告)号：US3566095A

公开(公告)日：1971-02-23

申请号：US3566095D

申请日：1968-05-22

Applicant: SANDERS ASSOCIATES INC

Inventor： SCHMITZ HERBERT E

IPC: G04F10/04 ,  G06F7/68 ,  H03M1/00 ,  G06F7/38

CPC classification number: G06F7/68 ,  G04F10/04

Abstract: A system for generating timing pulses proportional to the square root of the elapsed number of linear clock pulses employs a reference counter and a linear clock counter, the latter of which counts pulses from a linear clock. A comparator compares the counts in the counters and emits an output pulse when the two counts are the same. In response to successive output pulses from the comparator, the count in the reference counter increases by successive odd numbers and the linear clock counter recounts pulses from the linear clock until its count again equals that in the reference register, so that the successive pulses from the comparator are spaced from their predecessors by a uniformly increasing odd number of linear clock pulses.