公开(公告)号：US11302713B2

公开(公告)日：2022-04-12

申请号：US16912279

申请日：2020-06-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ashish Kumar Baraskar ,  Raghuveer S. Makala ,  Peter Rabkin

IPC: H01L27/11582 ,  H01L21/28 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/1157 ,  H01L27/11573 ,  H01L25/065 ,  H01L25/18 ,  H01L21/02 ,  H01L21/311 ,  H01L21/78 ,  H01L29/66 ,  H01L25/00 ,  H01L23/00 ,  H01L29/20

Abstract: A stack including a silicon oxide layer, a germanium-containing layer, and a III-V compound semiconductor layer is formed over a substrate. An alternating stack of insulating layers and spacer material layers is formed over the III-V compound semiconductor layer. The spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers. Memory openings are formed through the alternating stack and into the III-V compound semiconductor layer. Memory opening fill structures including a memory film and a vertical semiconductor channel are formed in the memory openings. The vertical semiconductor channels can include a III-V compound semiconductor channel material that is electrically connected to the III-V compound semiconductor layer. The substrate and at least a portion of the silicon oxide layer can be subsequently detached.

公开(公告)号：US11778817B2

公开(公告)日：2023-10-03

申请号：US16912196

申请日：2020-06-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ashish Kumar Baraskar ,  Raghuveer S. Makala ,  Peter Rabkin

IPC: H10B43/27 ,  H01L21/762 ,  H01L25/00 ,  H01L25/18 ,  H01L23/00 ,  H10B41/27 ,  H01L21/02

CPC classification number: H10B43/27 ,  H01L21/76254 ,  H01L24/08 ,  H01L25/18 ,  H01L25/50 ,  H10B41/27 ,  H01L21/0245 ,  H01L21/02513 ,  H01L21/02538 ,  H01L21/02595 ,  H01L21/02598 ,  H01L2224/08145

Abstract: A stack including a silicon oxide layer, a germanium-containing layer, and a III-V compound semiconductor layer is formed over a substrate. An alternating stack of insulating layers and spacer material layers is formed over the III-V compound semiconductor layer. The spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers. Memory openings are formed through the alternating stack and into the III-V compound semiconductor layer. Memory opening fill structures including a memory film and a vertical semiconductor channel are formed in the memory openings. The vertical semiconductor channels can include a III-V compound semiconductor channel material that is electrically connected to the III-V compound semiconductor layer. The substrate and at least a portion of the silicon oxide layer can be subsequently detached.