公开(公告)号：US20170271261A1

公开(公告)日：2017-09-21

申请号：US15183195

申请日：2016-06-15

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Masanori TSUTSUMI ,  Kota FUNAYAMA ,  Ryoichi EHARA ,  Youko FURIHATA ,  Zhenyu LU ,  Tong ZHANG ,  Tadashi NAKAMURA

IPC: H01L23/528 ,  H01L23/522 ,  H01L21/768 ,  H01L27/115

CPC classification number: H01L21/76816 ,  H01L21/76877 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11582

Abstract: A method of forming a monolithic three-dimensional memory device includes forming a first alternating stack over a substrate, forming an insulating cap layer, forming a first memory opening through the insulating cap layer and the first alternating stack, forming a sacrificial pillar structure in the first memory opening, forming a second alternating stack, forming a second memory opening, forming an inter-stack memory opening, forming a memory film and a first semiconductor channel layer in the inter-stack memory opening, anisotropically etching a horizontal bottom portion of the memory film and the first semiconductor channel layer to expose the substrate at the bottom of the inter-stack memory opening such that damage to portions of the first semiconductor channel layer and the memory film located adjacent to the insulating cap layer is reduced or avoided, and forming a second semiconductor channel layer in contact with the exposed substrate in the inter-stack memory opening.

公开(公告)号：US20240196610A1

公开(公告)日：2024-06-13

申请号：US18350595

申请日：2023-07-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ryoichi EHARA ,  Kenji SUGIURA ,  Katsufumi OKAMOTO ,  Yudai TANAKA ,  Kota FUNAYAMA

IPC: H10B43/27 ,  H10B41/27

CPC classification number: H10B43/27 ,  H10B41/27

Abstract: A memory device is formed by forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming memory openings through the alternating stack, forming memory opening fill structures in the memory openings, forming an access trench through a portion of the alternating stack forming an access trench fill structure in the access cavity, and iteratively performing multiple instances of a unit processing sequence. Each instance of the unit processing sequence includes a vertical recess etch step that vertically recesses the access trench fill structure and an isotropic etch step that isotropically recesses the sacrificial material layers. A finned access cavity is formed after the multiple instances of the unit processing sequence. A finned dielectric support structure is formed in the finned access cavity, and the sacrificial material layers are replaced with electrically conductive layers.