公开(公告)号：US20240292627A1

公开(公告)日：2024-08-29

申请号：US18659312

申请日：2024-05-09

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Takuya MUROOKA ,  Peng ZHANG ,  Kazuki ISOZUMI ,  Shinsuke YADA ,  Motoo OHAGA ,  Satoshi SHIMIZU

IPC: H10B43/35 ,  H10B41/27 ,  H10B41/35 ,  H10B43/27

CPC classification number: H10B43/35 ,  H10B41/27 ,  H10B41/35 ,  H10B43/27

Abstract: A memory device includes at least one alternating stack of insulating layers and electrically conductive layers overlying a source layer, a memory opening vertically extending through the at least one alternating stack, and a memory opening fill structure located in the memory opening and containing a vertical stack of memory elements and a vertical semiconductor channel. The memory opening fill structure includes a lateral protrusion having a tapered sidewall surface such that a lateral extent of the lateral protrusion decreases with a vertical distance from the source layer. One of the electrically conductive layers of the at least one alternating stack is a taper-containing electrically conductive layer that is located at a level of the lateral protrusion of the memory opening fill structure.