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1.
公开(公告)号:US20240292627A1
公开(公告)日:2024-08-29
申请号:US18659312
申请日:2024-05-09
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Takuya MUROOKA , Peng ZHANG , Kazuki ISOZUMI , Shinsuke YADA , Motoo OHAGA , Satoshi SHIMIZU
Abstract: A memory device includes at least one alternating stack of insulating layers and electrically conductive layers overlying a source layer, a memory opening vertically extending through the at least one alternating stack, and a memory opening fill structure located in the memory opening and containing a vertical stack of memory elements and a vertical semiconductor channel. The memory opening fill structure includes a lateral protrusion having a tapered sidewall surface such that a lateral extent of the lateral protrusion decreases with a vertical distance from the source layer. One of the electrically conductive layers of the at least one alternating stack is a taper-containing electrically conductive layer that is located at a level of the lateral protrusion of the memory opening fill structure.
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2.
公开(公告)号:US20230269939A1
公开(公告)日:2023-08-24
申请号:US17679335
申请日:2022-02-24
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Ramy Nashed Bassely SAID , Senaka KANAKAMEDALA , Raghuveer S. MAKALA , Peng ZHANG , Yanli ZHANG
IPC: H01L27/11582 , H01L27/1157 , H01L27/11565
CPC classification number: H01L27/11582 , H01L27/11565 , H01L27/1157
Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening fill structure including a vertical semiconductor channel and a memory film. The memory film includes a tunneling dielectric layer in contact with the vertical semiconductor channel, a first vertical stack of first dielectric oxide material portions located at levels of the insulating layers and including a dielectric oxide material of a first element, and a second vertical stack of second dielectric oxide material portions located at levels of the electrically conductive layers and including a mixed dielectric oxide material that is a dielectric oxide material of the first element and a second element.
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公开(公告)号:US20210159169A1
公开(公告)日:2021-05-27
申请号:US16697560
申请日:2019-11-27
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Dengtao ZHAO , Zhiping ZHANG , Peng ZHANG , Deepanshu DUTTA
IPC: H01L23/522 , H01L23/528 , G11C5/06 , G11C16/16 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11582
Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, where the electrically conductive layers comprise word lines located between a source select gate electrode and a drain select gate electrode, a memory opening vertically extending through each layer of the alternating stack to a top surface of the substrate, a memory film and vertical semiconductor channel having a doping of a first conductivity type located in the memory opening, and an active region having a doping of a second conductivity type that is an opposite of the first conductivity type and adjoined to an end portion of the vertical semiconductor channel to provide a p-n junction. The end portion of the vertical semiconductor channel has a first thickness, and a middle portion of the vertical semiconductor channel has a second thickness which is less than the first thickness.
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公开(公告)号:US20230099107A1
公开(公告)日:2023-03-30
申请号:US17485949
申请日:2021-09-27
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Yanli ZHANG , Peng ZHANG
IPC: H01L27/11551 , H01L27/11578 , H01L27/11529 , H01L27/11573
Abstract: A three-dimensional memory device includes a first alternating stack of first insulating layers and first electrically conductive layers located over a semiconductor material layer, an inter-tier dielectric layer, and a second alternating stack of second insulating layers and second electrically conductive layers located over the inter-tier dielectric layer. A memory opening vertically extends through the second alternating stack, the inter-tier dielectric layer, and the first alternating stack. A memory opening fill structure is located in the memory opening, and includes a first vertical semiconductor channel, a second vertical semiconductor channel, and an inter-tier doped region located between the first and the second semiconductor channel, and providing a first p-n junction with the first vertical semiconductor channel and providing a second p-n junction with the second vertical semiconductor channel.
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公开(公告)号:US20220367487A1
公开(公告)日:2022-11-17
申请号:US17317479
申请日:2021-05-11
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Peng ZHANG , Yanli ZHANG , Xiang YANG , Koichi MATSUNO , Masaaki HIGASHITANI , Johann ALSMEIER
IPC: H01L27/1159 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L27/11597 , H01L29/06 , H01L21/764
Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, an array of memory opening fill structures located within an array of memory openings vertically extending through the alternating stack, and a drain-select-level isolation structure vertically extending through drain-select-level electrically conductive layers between two rows of memory opening fill structures. The drain-select-level isolation structure may comprise a low-k dielectric material or an air gap.
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公开(公告)号:US20210183882A1
公开(公告)日:2021-06-17
申请号:US16710481
申请日:2019-12-11
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Yanli ZHANG , Dong-il MOON , Raghuveer S. MAKALA , Peng ZHANG , Wei ZHAO , Ashish BARASKAR
IPC: H01L27/11582 , H01L27/11556 , H01L23/532 , H01L21/311 , H01L27/11526 , H01L27/11519 , H01L27/11565 , H01L27/11573 , H01L21/28 , H01L23/528
Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, and memory stack structures extending through the alternating stack. Each of the memory stack structures contains a memory film and a vertical semiconductor channel. At least one of the electrically conductive layers contains a first conductive material portion having a respective inner sidewall that contacts a respective one of the memory films at a vertical interface, and a second conductive material portion that has a different composition from the first conductive material portion, and contacting the first electrically conductive material portion. The first conductive material portion has a lower work function than the second conductive material portion.
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公开(公告)号:US20210183883A1
公开(公告)日:2021-06-17
申请号:US16710572
申请日:2019-12-11
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Yanli ZHANG , Dong-il MOON , Raghuveer S. MAKALA , Peng ZHANG , Wei ZHAO , Ashish BARASKAR
IPC: H01L27/11582 , H01L27/11556 , H01L23/528 , H01L23/532 , H01L23/522 , H01L21/768 , H01L21/28 , H01L27/11526 , H01L27/11519 , H01L27/11565 , H01L27/11573
Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, and memory stack structures extending through the alternating stack. Each of the memory stack structures contains a memory film and a vertical semiconductor channel. At least one of the electrically conductive layers contains a first conductive material portion having a respective inner sidewall that contacts a respective one of the memory films at a vertical interface, and a second conductive material portion that has a different composition from the first conductive material portion, and contacting the first electrically conductive material portion. The first conductive material portion has a lower work function than the second conductive material portion.
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