INSULATED GATE SEMICONDUCTOR DEVICE HAVING A SHIELD ELECTRODE STRUCTURE AND METHOD
    2.
    发明申请
    INSULATED GATE SEMICONDUCTOR DEVICE HAVING A SHIELD ELECTRODE STRUCTURE AND METHOD 有权
    具有屏蔽电极结构的绝缘栅半导体器件及方法

    公开(公告)号:US20160126348A1

    公开(公告)日:2016-05-05

    申请号:US14992106

    申请日:2016-01-11

    Abstract: A semiconductor device includes a semiconductor region with a charge balance region on a junction blocking region, which has a lower doping concentration. A trench structure having an insulated shield electrode and an insulated gate electrode is provided in the semiconductor region. The semiconductor device further includes one or more features configured to improve operating performance. The features include terminating the trench structure in the junction blocking region, providing a localized doped region adjoining a lower surface of a body region and spaced apart from the trench structure, disposing a notch proximate to the lower surface of the body region, and/or configuring the insulated shield electrode to have a wide portion adjoining a narrow portion.

    Abstract translation: 半导体器件包括在结阻挡区域具有电荷平衡区域的半导体区域,其具有较低的掺杂浓度。 在半导体区域中设置有具有绝缘屏蔽电极和绝缘栅电极的沟槽结构。 半导体器件还包括配置成改善操作性能的一个或多个特征。 这些特征包括终止接合阻挡区域中的沟槽结构,提供邻接主体区域的下表面并与沟槽结构间隔开的局部掺杂区域,在靠近体区域的下表面设置切口,和/或 将绝缘屏蔽电极配置成具有邻近窄部分的宽部分。

    REVERSE RECOVERY CHARGE REDUCTION IN SEMICONDUCTOR DEVICES

    公开(公告)号:US20210391422A1

    公开(公告)日:2021-12-16

    申请号:US17446238

    申请日:2021-08-27

    Abstract: In a general aspect, a semiconductor device can include a semiconductor region of a first conductivity type and a well region of a second conductivity type. The well region can be disposed in the semiconductor region. An interface between the well region and the semiconductor region can define a diode junction at a depth below an upper surface of the semiconductor region. The semiconductor device can further include at least one dielectric region disposed in the semiconductor region. A dielectric region of the at least one dielectric region can have an upper surface that is disposed in the well region at a depth in the semiconductor region that is above the depth of the diode junction; and a lower surface that is disposed in the semiconductor region at a depth in the semiconductor region that is the same depth as the diode junction or below the depth of the diode junction.

    REVERSE RECOVERY CHARGE REDUCTION IN SEMICONDUCTOR DEVICES

    公开(公告)号:US20190326392A1

    公开(公告)日:2019-10-24

    申请号:US15959479

    申请日:2018-04-23

    Abstract: In a general aspect, a semiconductor device can include a semiconductor region of a first conductivity type and a well region of a second conductivity type. The well region can be disposed in the semiconductor region. An interface between the well region and the semiconductor region can define a diode junction at a depth below an upper surface of the semiconductor region. The semiconductor device can further include at least one dielectric region disposed in the semiconductor region. A dielectric region of the at least one dielectric region can have an upper surface that is disposed in the well region at a depth in the semiconductor region that is above the depth of the diode junction; and a lower surface that is disposed in the semiconductor region at a depth in the semiconductor region that is the same depth as the diode junction or below the depth of the diode junction.

    INSULATED GATE SEMICONDUCTOR DEVICE HAVING A SHIELD ELECTRODE STRUCTURE AND METHOD
    5.
    发明申请
    INSULATED GATE SEMICONDUCTOR DEVICE HAVING A SHIELD ELECTRODE STRUCTURE AND METHOD 有权
    具有屏蔽电极结构的绝缘栅半导体器件及方法

    公开(公告)号:US20170040447A1

    公开(公告)日:2017-02-09

    申请号:US15333441

    申请日:2016-10-25

    Abstract: A semiconductor device includes a semiconductor region with a charge balance region on a junction blocking region, the junction blocking region having a lower doping concentration. The junction blocking region extends between a pair of trench structures in cross-sectional view. The trench structures are provided in the semiconductor region and include at least one insulated electrode. In some embodiments, the semiconductor device further includes a first doped region disposed between the pair of trench structures. The semiconductor device may further include one or more features configured to improve operating performance The features include a localized doped region adjoining a lower surface of a first doped region and spaced apart from the trench structure, a notch disposed proximate to the lower surface of the first doped region, and/or the at least one insulated electrode configured to have a wide portion adjoining a narrow portion.

    Abstract translation: 半导体器件包括在结阻挡区上具有电荷平衡区的半导体区,该结阻挡区具有较低的掺杂浓度。 结阻挡区域在横截面图中在一对沟槽结构之间延伸。 沟槽结构设置在半导体区域中,并且包括至少一个绝缘电极。 在一些实施例中,半导体器件还包括设置在该对沟槽结构之间的第一掺杂区域。 半导体器件还可以包括被配置为改善操作性能的一个或多个特征。特征包括邻接第一掺杂区域的下表面并与沟槽结构间隔开的局部掺杂区域,靠近第一掺杂区域的下表面设置的凹口 掺杂区域和/或所述至少一个绝缘电极,其被配置为具有邻近窄部分的宽部分。

    INSULATED GATE SEMICONDUCTOR DEVICE HAVING A SHIELD ELECTRODE STRUCTURE
    6.
    发明申请
    INSULATED GATE SEMICONDUCTOR DEVICE HAVING A SHIELD ELECTRODE STRUCTURE 有权
    具有屏蔽电极结构的绝缘栅半导体器件

    公开(公告)号:US20160020288A1

    公开(公告)日:2016-01-21

    申请号:US14336770

    申请日:2014-07-21

    Abstract: A semiconductor device includes a semiconductor region with a charge balance region on a junction blocking region, which has a lower doping concentration. A trench structure having an insulated shield electrode and an insulated gate electrode is provided in the semiconductor region. The semiconductor device further includes one or more features configured to improve operating performance. The features include terminating the trench structure in the junction blocking region, providing a localized doped region adjoining a lower surface of a body region and spaced apart from the trench structure, disposing a notch proximate to the lower surface of the body region, and/or configuring the insulated shield electrode to have a wide portion adjoining a narrow portion.

    Abstract translation: 半导体器件包括在结阻挡区域具有电荷平衡区域的半导体区域,其具有较低的掺杂浓度。 在半导体区域中设置有具有绝缘屏蔽电极和绝缘栅电极的沟槽结构。 半导体器件还包括配置成改善操作性能的一个或多个特征。 这些特征包括终止接合阻挡区域中的沟槽结构,提供邻接主体区域的下表面并与沟槽结构间隔开的局部掺杂区域,在靠近体区域的下表面设置切口,和/或 将绝缘屏蔽电极配置成具有邻近窄部分的宽部分。

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