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    TERMINATION STRUCTURE FOR INSULATED GATE SEMICONDUCTOR DEVICE AND METHOD
    1.
    发明申请
    TERMINATION STRUCTURE FOR INSULATED GATE SEMICONDUCTOR DEVICE AND METHOD 有权

    公开(公告)号：US20210135019A1

    公开(公告)日：2021-05-06

    申请号：US17145607

    申请日：2021-01-11

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Mohammed Tanvir QUDDUS ,  Mihir MUDHOLKAR ,  Zia HOSSAIN

    IPC: H01L29/872 ,  H01L29/40 ,  H01L29/06 ,  H01L29/78

    Abstract: A semiconductor device structure includes a region of semiconductor material having an active region and a termination region. An active structure is disposed in the active region and a termination structure is disposed in the termination region. In one embodiment, the termination structure includes a termination trench and a conductive structure within the termination trench and electrically isolated from the region of semiconductor material by a dielectric structure. A dielectric layer is disposed to overlap the termination trench to provide the termination structure as a floating structure. A Schottky contact region is disposed within the active region. A conductive layer is electrically connected to the Schottky contact region and the first conductive layer extends onto a surface of the dielectric layer and laterally overlaps at least a portion of the termination trench.

    ELECTRONIC DEVICE HAVING A TERMINATION REGION INCLUDING AN INSULATING REGION
    2.
    发明申请
    ELECTRONIC DEVICE HAVING A TERMINATION REGION INCLUDING AN INSULATING REGION 有权
    具有包括绝缘区域的终止区域的电子设备

    公开(公告)号：US20150295025A1

    公开(公告)日：2015-10-15

    申请号：US14249677

    申请日：2014-04-10

    Applicant: Semiconductor Components Industries, LLC

    Inventor： Jaume ROIG GUITART ,  Zia HOSSAIN ,  Peter MOENS

    IPC: H01L29/06 ,  H01L29/40

    CPC classification number: H01L29/0634 ,  H01L29/06 ,  H01L29/0615 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/36 ,  H01L29/40 ,  H01L29/402 ,  H01L29/7811 ,  H01L29/7813

    Abstract: An electronic device can include an electronic component and a termination region adjacent to the electronic component region. In an embodiment, the termination region can include an insulating region that extends a depth into a semiconductor layer, wherein the depth is less than 50% of the thickness of the semiconductor layer. In another embodiment, the termination region can include a first insulating region that extends a first depth into the semiconductor layer, and a second insulating region that extends a second depth into the semiconductor layer, wherein the second depth is less than the first depth. In another aspect, a process of forming an electronic device can include patterning a semiconductor layer to define a trench within termination region while another trench is being formed for an electronic component within an electronic component region.

    Abstract translation: 电子设备可以包括电子部件和与电子部件区域相邻的端接区域。 在一个实施例中，终端区域可以包括将深度延伸到半导体层中的绝缘区域，其中深度小于半导体层厚度的50％。 在另一个实施例中，终端区域可以包括将第一深度延伸到半导体层中的第一绝缘区域和将第二深度延伸到半导体层中的第二绝缘区域，其中第二深度小于第一深度。 在另一方面，形成电子器件的工艺可以包括图案化半导体层以限定终止区域内的沟槽，同时为电子部件区域内的电子部件形成另一沟槽。

    ELECTRONIC DEVICE INCLUDING A TRENCH AND A CONDUCTIVE STRUCTURE THEREIN
    6.
    发明申请
    ELECTRONIC DEVICE INCLUDING A TRENCH AND A CONDUCTIVE STRUCTURE THEREIN 有权
    电子设备，包括TRENCH和导电结构

    公开(公告)号：US20150263166A1

    公开(公告)日：2015-09-17

    申请号：US14725064

    申请日：2015-05-29

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Zia HOSSAIN ,  Gordon M. GRIVNA

    IPC: H01L29/78 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423

    CPC classification number: H01L29/7827 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66734 ,  H01L29/7813

    Abstract: An electronic device can include a transistor structure, including a patterned semiconductor layer overlying a substrate and having a primary surface. The electronic device can further include first conductive structures within each of a first trench and a second trench, a gate electrode within the first trench and electrically insulated from the first conductive structure, a first insulating member disposed between the gate electrode and the first conductive structure within the first trench, and a second conductive structure within the second trench. The second conductive structure can be electrically connected to the first conductive structures and is electrically insulated from the gate electrode. The electronic device can further include a second insulating member disposed between the second conductive structure and the first conductive structure within the second trench. Processing sequences can be used that simplify formation of the features within the electronic device.

    Abstract translation: 电子器件可以包括晶体管结构，其包括覆盖在衬底上并具有主表面的图案化半导体层。 电子器件还可以包括在第一沟槽和第二沟槽的每一个内的第一导电结构，第一沟槽内的栅电极和与第一导电结构电绝缘的第一绝缘构件，设置在栅电极和第一导电结构之间 在第一沟槽内，以及在第二沟槽内的第二导电结构。 第二导电结构可以电连接到第一导电结构并且与栅电极电绝缘。 电子设备还可以包括设置在第二导电结构和第二沟槽内的第一导电结构之间的第二绝缘构件。 可以使用简化电子设备内的特征的形成的处理顺序。

    METHOD OF FORMING A SEMICONDUCTOR DEVICE INCLUDING TRENCH TERMINATION AND TRENCH STRUCTURE THEREFOR
    7.
    发明申请
    METHOD OF FORMING A SEMICONDUCTOR DEVICE INCLUDING TRENCH TERMINATION AND TRENCH STRUCTURE THEREFOR 有权
    形成包含TRENCH终止和其结构的半导体器件的方法

    公开(公告)号：US20150108569A1

    公开(公告)日：2015-04-23

    申请号：US14297204

    申请日：2014-06-05

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Gordon M. GRIVNA ,  Zia HOSSAIN ,  Ali SALIH

    IPC: H01L29/06 ,  H01L21/8234 ,  H01L27/088

    CPC classification number: H01L21/76205 ,  H01L21/76816 ,  H01L29/0615 ,  H01L29/0649 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7811 ,  H01L29/7813

    Abstract: In an embodiment, a method of forming a semiconductor may include forming a plurality of active trenches and forming a termination trench substantially surrounding an outer periphery of the plurality of active trenches. The method may also include forming at least one active trench of the plurality of active trenches having corners linking trench ends to sides of active trenches wherein each active trench of the plurality of active trenches has a first profile along the first length and a second profile at or near the trench ends; and forming a termination trench substantially surrounding an outer periphery of the plurality of active trenches and having a second profile wherein one of the first profile or the second profile includes a non-linear shape.

    Abstract translation: 在一个实施例中，形成半导体的方法可以包括形成多个有源沟槽并且形成基本上围绕多个有源沟槽的外周边的端接沟槽。 该方法还可以包括形成多个有源沟槽中的至少一个有源沟槽，其具有将沟槽端部连接到有源沟槽侧面的拐角，其中多个有源沟槽中的每个有源沟槽具有沿第一长度的第一分布， 或在沟槽末端附近; 以及形成基本上围绕所述多个有源沟槽的外周边的终端沟槽，并且具有第二形状，其中所述第一形状或所述第二形状中的一个包括非线性形状。

    REVERSE RECOVERY CHARGE REDUCTION IN SEMICONDUCTOR DEVICES
    8.
    发明申请
    REVERSE RECOVERY CHARGE REDUCTION IN SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20210391422A1

    公开(公告)日：2021-12-16

    申请号：US17446238

    申请日：2021-08-27

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Shengling DENG ,  Dean E. PROBST ,  Zia HOSSAIN

    IPC: H01L29/06 ,  H01L29/78 ,  H01L29/739 ,  H01L29/868 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10

    Abstract: In a general aspect, a semiconductor device can include a semiconductor region of a first conductivity type and a well region of a second conductivity type. The well region can be disposed in the semiconductor region. An interface between the well region and the semiconductor region can define a diode junction at a depth below an upper surface of the semiconductor region. The semiconductor device can further include at least one dielectric region disposed in the semiconductor region. A dielectric region of the at least one dielectric region can have an upper surface that is disposed in the well region at a depth in the semiconductor region that is above the depth of the diode junction; and a lower surface that is disposed in the semiconductor region at a depth in the semiconductor region that is the same depth as the diode junction or below the depth of the diode junction.

    TERMINATION STRUCTURE FOR INSULATED GATE SEMICONDUCTOR DEVICE AND METHOD
    9.
    发明申请
    TERMINATION STRUCTURE FOR INSULATED GATE SEMICONDUCTOR DEVICE AND METHOD 审中-公开

    公开(公告)号：US20200006579A1

    公开(公告)日：2020-01-02

    申请号：US16396446

    申请日：2019-04-26

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Mohammed Tanvir QUDDUS ,  Mihir MUDHOLKAR ,  Zia HOSSAIN

    IPC: H01L29/872 ,  H01L29/06 ,  H01L29/40

    Abstract: A semiconductor device structure includes a region of semiconductor material having an active region and a termination region. An active structure is disposed in the active region and a termination structure is disposed in the termination region. In one embodiment, the termination structure includes a termination trench and a conductive structure within the termination trench and electrically isolated from the region of semiconductor material by a dielectric structure. A dielectric layer is disposed to overlap the termination trench to provide the termination structure as a floating structure. A Schottky contact region is disposed within the active region. A conductive layer is electrically connected to the Schottky contact region and the first conductive layer extends onto a surface of the dielectric layer and laterally overlaps at least a portion of the termination trench.

    REVERSE RECOVERY CHARGE REDUCTION IN SEMICONDUCTOR DEVICES
    10.
    发明申请
    REVERSE RECOVERY CHARGE REDUCTION IN SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20190326392A1

    公开(公告)日：2019-10-24

    申请号：US15959479

    申请日：2018-04-23

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Shengling DENG ,  Dean E. PROBST ,  Zia HOSSAIN

    IPC: H01L29/06 ,  H01L29/78 ,  H01L29/739 ,  H01L29/868 ,  H01L29/10 ,  H01L29/08 ,  H01L29/66

    Abstract: In a general aspect, a semiconductor device can include a semiconductor region of a first conductivity type and a well region of a second conductivity type. The well region can be disposed in the semiconductor region. An interface between the well region and the semiconductor region can define a diode junction at a depth below an upper surface of the semiconductor region. The semiconductor device can further include at least one dielectric region disposed in the semiconductor region. A dielectric region of the at least one dielectric region can have an upper surface that is disposed in the well region at a depth in the semiconductor region that is above the depth of the diode junction; and a lower surface that is disposed in the semiconductor region at a depth in the semiconductor region that is the same depth as the diode junction or below the depth of the diode junction.

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