公开(公告)号：US09252248B2

公开(公告)日：2016-02-02

申请号：US14682376

申请日：2015-04-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami Jintyou ,  Yamato Aihara ,  Katsuaki Tochibayashi ,  Toru Arakawa

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/45 ,  H01L29/786 ,  H01L21/441 ,  H01L21/4757 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/66969 ,  H01L21/0237 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/441 ,  H01L21/47573 ,  H01L29/045 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/7869

Abstract: An object is to provide a technique by which a semiconductor device including a high-performance and high-reliable transistor is manufactured. A protective conductive film which protects an oxide semiconductor layer when a wiring layer is formed from a conductive layer is formed between the oxide semiconductor layer and the conductive layer, and an etching process having two steps is performed. In a first etching step, an etching is performed under conditions that the protective conductive film is less etched than the conductive layer and the etching selectivity of the conductive layer to the protective conductive film is high. In a second etching step, etching is performed under conditions that the protective conductive film is more easily etched than the oxide semiconductor layer and the etching selectivity of the protective conductive film to the oxide semiconductor layer is high.

Abstract translation: 本发明的目的是提供一种制造包括高性能和高可靠性晶体管的半导体器件的技术。 在氧化物半导体层和导电层之间形成由导电层形成布线层时保护氧化物半导体层的保护导电膜，并且进行具有两个步骤的蚀刻工艺。 在第一蚀刻步骤中，在保护导电膜比导电层蚀刻少的条件下进行蚀刻，并且导电层对保护导电膜的蚀刻选择性高。 在第二蚀刻步骤中，在保护导电膜比氧化物半导体层更容易蚀刻的条件下进行蚀刻，并且保护性导电膜对氧化物半导体层的蚀刻选择性高。

公开(公告)号：US09337218B2

公开(公告)日：2016-05-10

申请号：US14038899

申请日：2013-09-27

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yamato Aihara ,  Masami Jintyou ,  Rai Sato ,  Toru Arakawa

IPC: G02F1/1333 ,  G02F1/1335 ,  G02F1/13 ,  H01L27/12 ,  G02F1/137

CPC classification number: H01L27/1262 ,  G02F1/133553 ,  G02F1/13725

Abstract: In the liquid crystal display device in which a guest-host liquid crystal layer is provided between a first substrate having a reflective film which is a pixel electrode layer (also referred to as a first electrode layer) and a second substrate having a common electrode layer (also referred to as a second electrode layer), the reflective film which is a pixel electrode layer is projected into the liquid crystal layer, and a micron-sized first unevenness and a nano-sized second unevenness on the first unevenness are provided.

公开(公告)号：US09040396B2

公开(公告)日：2015-05-26

申请号：US14169837

申请日：2014-01-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami Jintyou ,  Yamato Aihara ,  Katsuaki Tochibayashi ,  Toru Arakawa

IPC: H01L21/20 ,  H01L21/00 ,  H01L29/66 ,  H01L21/02 ,  H01L29/45 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/0237 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/441 ,  H01L21/47573 ,  H01L29/045 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/7869

Abstract: An object is to provide a technique by which a semiconductor device including a high-performance and high-reliable transistor is manufactured. A protective conductive film which protects an oxide semiconductor layer when a wiring layer is formed from a conductive layer is formed between the oxide semiconductor layer and the conductive layer, and an etching process having two steps is performed. In a first etching step, an etching is performed under conditions that the protective conductive film is less etched than the conductive layer and the etching selectivity of the conductive layer to the protective conductive film is high. In a second etching step, etching is performed under conditions that the protective conductive film is more easily etched than the oxide semiconductor layer and the etching selectivity of the protective conductive film to the oxide semiconductor layer is high.

Abstract translation: 本发明的目的是提供一种制造包括高性能和高可靠性晶体管的半导体器件的技术。 在氧化物半导体层和导电层之间形成由导电层形成布线层时保护氧化物半导体层的保护导电膜，并且进行具有两个步骤的蚀刻工艺。 在第一蚀刻步骤中，在保护导电膜比导电层蚀刻少的条件下进行蚀刻，并且导电层对保护导电膜的蚀刻选择性高。 在第二蚀刻步骤中，在保护导电膜比氧化物半导体层更容易蚀刻的条件下进行蚀刻，并且保护性导电膜对氧化物半导体层的蚀刻选择性高。

公开(公告)号：US20140024154A1

公开(公告)日：2014-01-23

申请号：US14038899

申请日：2013-09-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yamato AIHARA ,  Masami Jintyou ,  Rai Sato ,  Toru Arakawa

IPC: H01L27/12

CPC classification number: H01L27/1262 ,  G02F1/133553 ,  G02F1/13725

Abstract: In the liquid crystal display device in which a guest-host liquid crystal layer is provided between a first substrate having a reflective film which is a pixel electrode layer (also referred to as a first electrode layer) and a second substrate having a common electrode layer (also referred to as a second electrode layer), the reflective film which is a pixel electrode layer is projected into the liquid crystal layer, and a micron-sized first unevenness and a nano-sized second unevenness on the first unevenness are provided.

Abstract translation: 在具有作为像素电极层（也称为第一电极层）的反射膜的第一基板和具有公共电极层的第二基板之间设置客体主体液晶层的液晶显示装置 （也称为第二电极层），作为像素电极层的反射膜投射到液晶层中，并且在第一凹凸上设置微米级的第一凹凸和纳米尺寸的第二凹凸。