公开(公告)号：US20190273181A1

公开(公告)日：2019-09-05

申请号：US16409603

申请日：2019-05-10

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Mi Hee LEE ,  Chang Yeon KIM ,  Ju Yong PARK ,  Jong Kyun YOU ,  Joon Hee LEE

IPC: H01L33/20 ,  H01L33/38 ,  H01L33/32 ,  H01L33/10

Abstract: A light emitting diode includes: a first conductivity type semiconductor layer; a mesa including an active layer and a second conductivity type semiconductor layer, the mesa having a groove disposed under some region of the first conductivity type semiconductor layer to expose an edge of the first conductivity type semiconductor layer, the groove exposing the first conductivity type semiconductor layer; a first electrode including a first contact portion electrically connected to the first conductivity type semiconductor layer through the groove; a second electrode disposed between the first electrode and the second conductivity type semiconductor layer and electrically connected to the second conductivity type semiconductor layer; and an upper electrode pad disposed adjacent to the first conductivity type semiconductor layer and connected to the second electrode, wherein the groove has a shape surrounding a region including a center of the mesa and partially open.

公开(公告)号：US20170317236A1

公开(公告)日：2017-11-02

申请号：US15527807

申请日：2015-12-04

Applicant: Seoul Viosys Co., Ltd.

Inventor： Mi Hee LEE ,  Jun Hee LEE ,  So Ra LEE ,  Mi Na JANG

IPC: H01L33/24 ,  H01L33/40 ,  H01L33/32

CPC classification number: H01L33/24 ,  H01L33/0079 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32 ,  H01L33/382 ,  H01L33/405

Abstract: A nitride semiconductor light emitting device may include: a semiconductor layer; an active layer; a second semiconductor layer; mesa regions formed to expose the semiconductor layer; a second electrode formed under the second semiconductor layer; a cover metal layer formed at a corner under the second semiconductor layer to overlap part of the second electrode; an insulating layer formed under the cover metal layer, the second electrode, and the mesa regions and having openings to expose the semiconductor layer; a first electrode disposed in the openings and over a conductive substrate; and a second electrode pad formed over the exposed cover metal layer, wherein when the width a of the second electrode between adjacent mesa regions and the width b of the second electrode between a mesa region at the edge and an extension line of the cover metal layer at the corner have a relation of a>b.