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Patent Agency Ranking
公开(公告)号：US10734894B1
公开(公告)日：2020-08-04
申请号：US16547107
申请日：2019-08-21
Applicant: Silicon Laboratories Inc.
Inventor： Chao Yang , Mohamed Elsayed
Abstract: A charge pump system including charge pump circuitry, a charge pump controller, and current limit circuitry. The charge pump circuitry has an input coupled to a supply input node and has an output for developing a drive voltage. The charge pump controller controls the charge pump circuitry to increase the drive voltage above a supply voltage provided to the supply input node. The current limit circuitry limits current through the charge pump circuitry to a limited current level that is less than a maximum current level during a current limit mode to reduce current spikes at the nodes of the charge pump system that may generate EMI. A current mirror may be used as the current limit circuitry to directly limit current through switches of the charge pump circuitry. The timing of the charge pump switches may also be modified such as inserting strategic delays to reduce the current spikes.
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公开(公告)号：US09935649B1
公开(公告)日：2018-04-03
申请号：US15681710
申请日：2017-08-21
Applicant: SILICON LABORATORIES INC.
Inventor： Axel Thomsen , Chao Yang , Xiaodong Wang
CPC classification number: H03M3/452 , H03K5/24 , H03M1/002 , H03M1/0854 , H03M1/368
Abstract: A quantizer including passive summers, dynamic comparators and a clock generator. Each passive summer samples the input voltages and a reference voltage scaled by one of multiple graduated gains, and subtracts the scaled reference voltage from the sum of the input voltages. The graduated gains divide a predetermined voltage range into multiple voltage subranges, each between sequential pairs of the passive summers. The dynamic comparators compare each sequential pair of passive summer output voltages according to multiple splitting ratios and provide corresponding quantization bits. The dynamic comparators are activated in groups to reduce comparator kickback. Each dynamic comparator recharges the passive summer output voltages coupled to its inputs back to their initial voltage values to reduce kickback residual. The passive summers eliminate the need for a resistor string to generate the reference voltages. Staggered activation and comparator recharging replace preamplifiers used to suppress kickback and kickback residuals.
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公开(公告)号：US10090838B2
公开(公告)日：2018-10-02
申请号：US14871734
申请日：2015-09-30
Applicant: Silicon Laboratories Inc.
Inventor： Chao Yang , Matthew Powell
IPC: H03K19/0185
Abstract: An apparatus includes an integrated circuit, which includes a processor core, a plurality of input/output (I/O) circuits, and a plurality of over voltage tolerant (OVT) circuits. Each I/O circuit is associated with an I/O pad and is associated with an OVT circuit of the plurality of OVT circuits. At least one of the OVT circuits includes a passive circuit, which is adapted to receive a pad voltage from the associated I/O pad; receive a supply voltage of the associated I/O circuit; and based on a relationship of the received pad voltage relative to the received supply voltage, selectively couple a gate of a transistor of the associated I/O circuit to the pad voltage to inhibit a leakage current.
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公开(公告)号：US20160182051A1
公开(公告)日：2016-06-23
申请号：US14574134
申请日：2014-12-17
Applicant: SILICON LABORATORIES INC.
Inventor： Chao Yang , Praveen Kallam
IPC: H03K19/0185
CPC classification number: H03K19/018514 , H03K19/018528
Abstract: In some embodiments, a method may include receiving an input signal at an input stage of a circuit and amplifying the input signal using an amplifier of the circuit to produce a level-shifted output signal. The method may further include selectively controlling switches of an active load coupled to the input stage based on the level-shifted output signal to turn off current flow between transitions in the input signal.
Abstract translation: 在一些实施例中，方法可以包括在电路的输入级接收输入信号，并使用电路的放大器放大输入信号以产生电平移位的输出信号。 该方法还可以包括基于电平移位的输出信号选择性地控制耦合到输入级的有源负载的开关，以截止输入信号中的转换之间的电流。
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公开(公告)号：US09787310B2
公开(公告)日：2017-10-10
申请号：US14574134
申请日：2014-12-17
Applicant: Silicon Laboratories Inc.
Inventor： Chao Yang , Praveen Kallam
IPC: H03L5/00 , H03K19/0185
CPC classification number: H03K19/018514 , H03K19/018528
Abstract: In some embodiments, a method may include receiving an input signal at an input stage of a circuit and amplifying the input signal using an amplifier of the circuit to produce a level-shifted output signal. The method may further include selectively controlling switches of an active load coupled to the input stage based on the level-shifted output signal to turn off current flow between transitions in the input signal.
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